Stack universal serial bus connector

Details Stack universal serial bus connector Stack universal serial bus connector

2000-06-15

2003-08-26

Paumen, Gary (Department: 2833)

Electrical connectors

With supporting means for coupling part

Supporting plural, independent coupling parts

C439S607070, C439S939000

Reexamination Certificate

active

06609928

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a connector for the universal serial bus (“USB”). More particularly, it relates to a stacked dual connector system that is interchangeable with and has no larger footprint than a single USB compliant connector.
2. Description of the Prior Art
A new standard for a serial communications architecture called the universal serial bus (“USB”) has been completed and is now in use in personal computers and elsewhere. The USB architecture is fast and allows daisy chaining up to 127 devices. The USB standard defines two channels: a fast channel running at 500 mega-bits/second which will be used for monitors, networks, and printers; and a slow channel running at 100 kilo-bits/second which will be used for keyboards, the mice, scanners and modems. USB controllers are designed to handle both channels.
A perspective view of the currently available USB compliant connector is set out in FIG.
1
. Referring now to
FIG. 1
, a single USB compliant socket consists of a rectangular shaped housing
12
having a front surface
14
, side surfaces
16
and
18
, a top surface
20
, a back surface
22
and a bottom surface
24
. Bottom surface
24
sits on a mother board
26
and occupies an area of mother board
26
which is shown in
FIG. 1
as striped area
28
. This area is called the footprint of housing
12
. An opening
30
in front surface
14
leads to a cavity within housing
12
. Within this cavity there are four conductors (not shown) which are connected internally to four pins (not shown) that project downwardly through bottom
24
and make contact with four conductors (not shown) on mother board
26
. An electrically conducting cowling (not shown) fits around the outside of housing
12
and is connected to the chassis of the computer (not shown) to provide shielding against electromagnetic radiation. A USB compliant plug fits through opening
30
into the cavity and makes electrical contact with the four conductors. Together the socket and plug form a USB compliant connector that is used to electrically connect peripheral devices to the mother board on which the CPU of the computer is located. The mechanical dimensions and tolerances as well as the electrical specifications for both the socket and the plug are well known and are not part of this invention.
The problem with the single USB connector is that it can handle only one of the two USB channels. Thus, if a computer system for example is to have both the slow channel and the fast channel, there must be two separate USB connectors on the mother board. However, the arrangement of the mother board in the computer chassis does not provide enough room for two side by side USB connectors.
SUMMARY OF THE INVENTION
The invention is an improvement on a single USB compliant socket for mounting on a predetermined area of a mother board and includes a first USB compliant socket having a first array of conductors that make electrical contact with a mating array of electrical conductors in a USB compliant plug and which make contact with a mating first array of electrical conductors on the mother board. The mother board is situated within a computer chassis. The invention includes a second USB compliant socket assembly having a second array of conductors that make electrical contact with a mating array of conductors in a USB compliant plug. The second USB compliant socket assembly is positioned adjacent to the first USB compliant socket assembly such that the first and second USB compliant socket assemblies together occupy an area on the mother board that is no greater than the area on the mother board occupied by a single connector. The second array of conductors makes contact with a second linear array of conductors on the mother board.


REFERENCES:
patent: 4659163 (1987-04-01), Althous et al.
patent: 5030115 (1991-07-01), Regnier et al.
patent: 5037330 (1991-08-01), Fulponi et al.
patent: 5178562 (1993-01-01), Ermini
patent: 5255146 (1993-10-01), Miller
patent: 5400202 (1995-03-01), Metz et al.
patent: 5562507 (1996-10-01), Kan

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