Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal
Reexamination Certificate
2002-08-20
2003-07-29
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Making device or circuit emissive of nonelectrical signal
C438S029000, C438S151000, C438S155000, C438S608000, C438S609000, C438S612000
Reexamination Certificate
active
06599767
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method of manufacturing an organic light emitting diode (OLED) display and, more particularly, to a method of simultaneously defining an indium tin oxide (ITO) defending layer and an ITO pixel electrode on the bonding pad and partial of the transparent insulating substrate surface, respectively.
BACKGROUND OF THE INVENTION
Owing to high brightness, fast response speed, light, thin and small features, full color, no viewing angle differences, no need for an LCD back-light board and low electrical consumption, an organic light emitting diode (OLED) display takes the lead to substitute a twist nematic (TN) or a super twist nematic (STN) liquid crystal display. Further, it substitutes for a small-sized thin-film transistor (TFT) LCD to become a new display material of fabricating portable information products, cell phones, personal digital assistants (PDAs) and notebooks.
Please refer to FIG.
1
. An OLED
10
is comprised of several layers in which at least one of the several layers comprises an organic material that can be made to electroluminesce by applying a voltage across the device. As shown in the figure, there are four organic layers sandwiched between a transparent anode
14
and a metal cathode
24
. These organic layers comprise a hole injecting layer
16
, a hole transporting layer
18
, an emitting layer
20
and an electron transporting layer
22
. Generally, the material of the transparent anode
14
, fabricated on the transparent insulating substrate
12
by methods of sputtering or vacuum evaporation, is selected from an ITO or similar oxide compounds. In addition, the metal cathode
24
is made of a magnesium, an aluminum, or a lithium. When the applied voltage between the transparent anode
14
and the metal cathode
24
is high enough, charge carriers such as electrons and holes are injected into organic layers. An electron-hole pair can be formed thereafter to recombine radiatively and emit light if the electrons and holes meet.
The ITO layer mentioned above is a conductive oxide film with high transparency, and mainly comprised of an indium oxide (about 90~95%) and a tin oxide (about 5~10%). Up to today, this conductive metal oxide is generally applied to the manufactures of an LCD, a touch panel and an OLED.
In OLED manufacture, the forming process of the ITO is variable according to the method of light emitting, such as top emitting or bottom emitting.
FIG.
2
and
FIG. 3
disclose a TFT fabrication of an OLED. Firstly, metal patterns are defined simultaneously on a transparent insulating substrate
30
, wherein the metal patterns include a gate structure
32
and a bonding pad
34
. Then, a gate dielectrics
36
is formed on the transparent insulating substrate
30
and covers both the gate structure
32
and the bonding pad
34
. After that, partial portion of the gate dielectrics located above the bonding pad
34
is removed to expose the pad's
34
upper surface, providing an electrical connection to devices mounted on the transparent insulating substrate
30
. Next, a silicon-based layer
38
is formed on the partial gate dielectrics
36
over the gate structure
32
. An ITO pixel electrode
40
is defined on the further partial of the gate dielectrics
36
uncovered by the silicon-based layer
38
.
It's worthy to note that, after the formation of ITO pixel electrode
40
and before the generation of an organic layer, an oxygen plasma pre-treatment is performed to remove residues remained on the ITO pixel electrode
40
surface during the process so as to improve quality of the ITO. This treatment, however, leads to oxidation of the exposed bonding pad
34
and formation of a metal oxide layer thereon. Based on these, the conductivity of the bonding pad
34
and the yield of the process will be lowered.
SUMMARY OF THE INVENTION
It is therefore the first objective of the present invention to provide a method of manufacturing a bonding pad which is served as an electrical connection to devices fabricated on a transparent insulating substrate.
The second objective of the present invention is to provide a method of forming an ITO defending layer and an ITO pixel electrode simultaneously on the bonding pad and partial upper surface of the transparent insulating substrate, respectively.
The third objective of the present invention is to provide a method of manufacturing an ITO defending layer, without adding or altering any present process step, for avoiding oxidation of the bonding pad.
To accomplish these above objectives, according to the present invention, firstly metal patterns include a gate structure and a bonding pad are defined simultaneously on a transparent insulating substrate, wherein the bonding pad is used to provide an electrical connection to devices fabricated on the transparent insulating substrate. A gate dielectrics and a silicon-based layer are then deposited sequentially on the gate structure. After that, the silicon-based layer, except the portion above the gate structure, is removed by an etching process. An ITO defending layer and an ITO pixel electrode are defined simultaneously on the bonding pad and the partial gate dielectrics uncovered by the silicon-based layer, respectively. The ITO defending layer described above is served to protect the bonding pad from being oxidized and to ensure the conductivity thereof. Next, a metal layer is formed on the transparent insulating substrate for covering the silicon-based layer. The metal layer is lastly patterned to define drain and source electrodes over the gate structure and to expose the upper surface of the silicon-based layer, in which the source electrode is further connected with the ITO pixel electrode.
In this embodiment, the drain and source electrodes are formed of an aluminum and a chromium. The gate dielectrics is formed of an SiNx, an SiO
2
or a high-k layer. The silicon-based layer is chosen from an amorphous silicon.
Additional objective, advantages and novel features of the invention will be set forth in part in the description which follows, and in part will become apparent those who skilled in the art upon examination of the following or may be learned by practice of the invention. The objectives and advantages of the invention may be realized and attained by means of the instrumentalities and combinations particularly pointed out in the appended claims.
REFERENCES:
patent: 5721160 (1998-02-01), Forrest et al.
patent: 6322712 (2001-11-01), Hanson et al.
patent: 6387600 (2002-05-01), Hanson
patent: 6471879 (2002-10-01), Hanson et al.
patent: 2002/0011459 (2002-01-01), Hanson et al.
patent: 2002/0086244 (2002-07-01), Hanson
AU Optronics Corp.
Gurley Lynne A.
Troxell Law Office PLLC
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