Electricity: battery or capacitor charging or discharging – Battery or cell discharging – With charging
Reexamination Certificate
2001-12-21
2003-01-14
Tso, Edward H. (Department: 2838)
Electricity: battery or capacitor charging or discharging
Battery or cell discharging
With charging
C320S137000
Reexamination Certificate
active
06507171
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to battery charging circuitry and methods and, more particularly, relates to methods and apparatus for measuring a battery charging current, as well as a battery discharging current.
BACKGROUND OF THE INVENTION
A battery charging circuit of most interest to these teachings is one used with a wireless terminal, also referred to as mobile station or as a personal communicator. During a charging operation a relatively high current is required to be measured and monitored, typically in the range of several hundred milliamps (mA) or even more. Referring to
FIG. 1
, conventional practice places a series resistance (Rmeas) between a source of charging current, shown as a charger
1
, and the associated charger switch (Msw)
2
. Msw is coupled to the battery
3
to be recharged. The battery charging current (Ich) flows through Rmeas, and the resulting voltage drop (Vmeas) across Rmeas is sensed for controlling the charging cycle. For example, an analog-to-digital converter (ADC)
4
may be used to convert Vmeas to an a digital representation, which in turn may be used to modulate the pulse width of a signal output from a pulse width modulator (PWM)
5
. Vmeas may also be employed as a measurement of the battery voltage. The output of the PWM
5
can be used directly, or it can be further modified by a charging controller
6
, to provide a switching signal (Vcntrl) to Msw. In this way the conduction through Msw is varied so that as the battery
3
reaches full charge the on-time of Msw can be gradually reduced until finally Msw is supplying only a maintenance (trickle) charge to the battery
3
. In other embodiments the feedback loop from Rmeas to Vcntrl could be implemented in an entirely analog fashion, or in a mixed analog/digital fashion.
One significant drawback to the use and operation of this type of conventional charging circuit is that Rmeas is required to be a low ohmic value, high precision resistor. Due to the significant current flow through Rmeas it must also be large physically in order to dissipate the resulting heat. The use of a physically large resistor implies that a separate, discrete component be used, as opposed to an integrated component, which increases the cost as well as the complexity of the manufacturing and testing operations. Furthermore, Rmeas must be carefully located so as not to excessively heat adjacent circuit components. In addition, because of the low ohmic value of Rmeas the resulting voltage drop Vmeas is also small, which can require the use of high resolution ADC
4
to obtain an accurate measurement of Ich.
Copending U.S. patent application Ser. No. 09/772,249, filed on Jan. 29, 2001, entitled Method and Apparatus for Measuring Battery Charge and Discharge Current, by Antti Ruha (incorporated by reference herein in its entirety, and hereinafter referred to simply as the parent application), discloses various embodiments of circuitry that enable the resistance Rmeas to be eliminated and to relax the ADC conversion range. It is thus desirable to provide even further improvements to simplify the current measurement and conversion functions.
OBJECTS AND ADVANTAGES OF THE INVENTION
It is a first object and advantage of this invention to provide an improved battery energy management circuit.
It is another object and advantage of this invention to provide an improved battery charging circuit for use in a wireless terminal that overcomes the foregoing and other problems, and that provides a direct analog-to-digital conversion function whereby a value of the charge/discharge current can be realized in a digital fashion.
It is a further object and advantage of this invention to provide an improved battery discharging circuit for use in making battery capacity and other types of measurements.
SUMMARY OF THE INVENTION
The foregoing and other problems are overcome and the foregoing objects and advantages are realized by methods and apparatus in accordance with embodiments of this invention.
The invention provides a circuit for measuring battery charge current and converting the measurement directly into a digital value. As the current is digitized directly to digital values no separate current-to-voltage and voltage-to-digital conversion stages or processes are required, thereby conserving integrated circuit area, cost and complexity.
Additional savings can be achieved as the current-to-digital converter can be realized without using external (high power) resistors. Furthermore, the circuit can be realized without requiring the use of accurate (precision) integrated resistors or capacitors, enabling lower cost integrated circuit processes to be employed.
In this invention the conversion is based on the sigma-delta conversion principle, except for the measurement and the data conversion that are performed in the current domain. In this invention a mirrored and scaled-down replica (in the average sense) of the charging current is generated with a (sigma-delta) feedback loop. Simultaneously, and as a result of the function of the sigma-delta feedback loop, an over-sampled coarse digital representation of the value of the battery charge current is generated. The digital representation of the battery charge current may be low-pass filtered and decimated to increase the overall measurement accuracy.
The use of the teachings of this invention results in a simpler, more compact and more cost-effective solution to the battery current measurement problem than those currently in use. The component accuracy requirements are relaxed, and no external or integrated resistors of high accuracy (or capacitors) are required or used in the measurement circuitry. The avoidance of external components reduces material and assembly costs. The relaxation in the resistor (or capacitor) accuracy reduces cost by reducing the integrated circuit process complexity required (the resistor processing steps are not required). In that no accurate resistors are required, the battery charge current measurement circuitry, due to the sigma-delta and over-sampling principles, relies more on the (moderate) component matching that is intrinsically obtained with conventional integrated components. The overall saving in silicon area made possible by the use of this invention can be significant when compared to, for example, an approach that uses a 10-bit ADC in combination with a resistor network of 10-bit accuracy.
An important aspect of this invention resides in the avoidance of the intermediate conversion of a current to be measured to a voltage (achieved by flowing the current through a resistor), as the current to be measured is directly converted to a digital value. This approach significantly reduces the amount of circuitry and circuit area that is required.
Disclosed herein is a method for charging a battery and circuitry for performing the method. The method includes steps of: (A) generating at a first node a battery charge current (Icharge) for charging the battery; (B) generating at a second node a replica current (Irep) from Icharge, where Irep<Icharge; and (C) operating a closed loop current sink for sinking Irep, where a digital output of said closed loop current sink is a measure of the magnitude of Icharge. In the preferred embodiment the digital output is input to a control circuit for controlling the generation of Icharge.
Also in the preferred embodiment the closed loop current sink is constructed from a multi-stage DAC that is driven by an output of an n-level digital loop filter having a value that is a function of a voltage difference between the first node and the second node. A presently preferred implementation of the digital loop filter employs an n-level up/down counter that counts up or down as a function of the voltage difference between the first node and the second node. Preferably the multi-stage DAC is a multi-stage current steering DAC. A selection of stages of the multi-stage DAC to be turned off and on is made by a DEM logic block that is interposed between the output of the counter and the multi-stage
Kauppinen Jani
Ruha Antti
Ruotsalainen Tarmo
Tervaluoto Jussi-Pekka
Harrington & Smith ,LLP
Nokia Corporation
Tso Edward H.
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