Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2001-09-13
2003-05-13
Tran, M. (Department: 2818)
Static information storage and retrieval
Floating gate
Particular biasing
C365S222000
Reexamination Certificate
active
06563740
ABSTRACT:
BACKGROUND OF THE INVENTION
The invention relates to electronic devices and, more particularly, to an electronic circuit and method for testing and refreshing non-volatile memory.
DESCRIPTION OF THE RELATED TECHNOLOGY
Electronic devices are often identically manufactured in large numbers in order to decrease their average cost. The resulting devices may be intended for different uses. In addition the manufacturing process may result in some variation in the parameters of devices. In both of those cases, non-volatile memory can be used to store information that differentiates the devices.
When electronic devices that are manufactured in an identical manner are intended for use in different applications, functionality may be built into the devices that is triggered by the presence or absence of data in non-volatile memory. In a simple example, an electronic device may be used in one of two products. A single non-volatile bit is programmed with either a high or low voltage. A high voltage would enable functionality appropriate to the first product, while a low voltage would enable functionality appropriate for the second product. A greater amount of non-volatile memory would allow for greater diversity of function.
When electronic devices that are manufactured in an identical manner are intended for use in the same application, non-volatile memory may still be useful for storing data that calibrates the device. For example, a particular manufacturing process could result in variations in electrical parameters. A circuit could be included in the electronic device that modifies those parameters in accordance to the data in a non-volatile memory. A post-manufacture test could be performed to indicate the electrical parameter for a particular device. The non-volatile memory could then be programmed so that the modification circuit corrects any deviation from the desired value of the electrical parameter. Non-volatile memory is also useful for other tasks in electronic devices as is known to those of skill in the art. Non-volatile memory circuits and methods of using non-volatile memory have utility in the electronic device industry.
Non-volatile memory retains a state representing data in the absence of power. Under some circumstances or over a sufficient length of time, the data-representing states can be lost. For example, non-volatile memory can be implemented by trapping charge on an isolated node to represent a certain data state. The presence of the charge affects an electrical characteristic of a circuit containing the node. If the charge dissipates, the characteristic changes and the data will not be read correctly. Incorrectly read data can detrimentally affect the calibration or function identification that the non-volatile memory was included to achieve.
SUMMARY OF THE INVENTION
The present invention is directed to an electronic circuit with non-volatile memory, a method for refreshing the non-volatile memory, and systems employing the circuit or method.
In one embodiment of the electronic circuit with non-volatile memory of the present invention, the non-volatile memory is located on an integrated circuit and includes several memory cells each of which has a voltage state as data and a gate. The integrated circuit also includes a gate bias circuit that is coupled to the gates of the memory cells. The gate bias circuit includes at least a read voltage and a margin voltage. A detection circuit on the integrated circuit is coupled to the cells. The detection circuit includes a comparator and a reference voltage. The reference voltage and the voltage state of one of the cells are coupled to the comparator. The detection circuit includes an output generating a signal corresponding to the comparator output. The integrated circuit also includes a monitor circuit. The monitor circuit is coupled to the output of the detection circuit and determines whether the voltage state of the cell transitions between application of the read and margin voltages to the gate.
In a more specific embodiment of the present invention, the non-volatile memory is programmable. In another more specific embodiment of the invention, integrated circuit includes a programming circuit that programs cells that the monitor circuit determines are transitioning between application of the read and margin voltages to the gate. In another more specific embodiment of the invention, the monitor circuit includes a checksum circuit. The checksum circuit allows the monitor circuit to compare cells in groups by calculating the checksum of the cell voltage states when the read voltage is applied and when the margin voltage is applied. All the cells in the memory can be included in a single checksum test. In another more specific embodiment of the invention, the non-volatile memory also includes another plurality of cells that are not attached to the bias circuit or the detection circuit.
In a different embodiment of the electronic circuit with non-volatile memory of the present invention. The cells are connected to both a detection circuit and a margin circuit. The detection circuit compares cell voltage states to a reference voltage and the margin circuit compares them to a margin voltage. A monitor circuit determines whether the voltage states of any of the cells is between the reference voltage and the margin voltage.
In a method embodiment of the present invention, a read voltage is applied to the gate of a cell of a non-volatile memory. The voltage state of that cell is then compared to a reference voltage to determine a first result. A margin voltage is applied to the gate of the cell. The voltage state of that cell is then compared to the reference voltage to determine a second result. The first and second results are compared and a signal is produced if they differ.
In a more specific method embodiment of the invention, the margin voltage is applied to the cell before the read voltage is applied. In another more specific method embodiment of the invention, first and second results for a plurality of cells are stored. Two checksums are then calculated: one for the first results and one for the second results. The step of comparing the first result to the second result is then accomplished by comparing the checksums.
A feature of the invention is monitoring the voltage states of cells in non-volatile memory in an electronic circuit.
Another feature is storing data in an electronic circuit.
Another feature is monitoring data integrity in an electronic circuit.
An advantage of the present invention is detecting degradation of data in non-volatile memory.
Another advantage is accurately maintained data and reprogramming of data values that are approaching transition.
Still another advantage is reduced need for separate test circuits.
Another advantage is software selection of margin voltage.
Another advantage is flexible grouping of memory cells for testing.
Other and further features and advantages will be apparent from the following description of presently preferred embodiments of the invention, given for the purpose of disclosure and taken in conjunction with the accompanying drawings. Not all embodiments of the invention will include all the specified advantages. For example, one embodiment may only monitor the voltage states of cells in non-volatile memory in an electronic circuit, while another reprograms data values that are approaching transition.
REFERENCES:
patent: 5828607 (1998-10-01), Bushey et al.
patent: 5852582 (1998-12-01), Cleveland et al.
Obolsky Mitchel
Thomsen Joseph A.
Triece Joseph W.
Baker & Botts L.L.P.
Microchip Technology Incorporated
Tran M.
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