Chemistry: electrical and wave energy – Apparatus – Electrolytic
Reexamination Certificate
2000-02-11
2003-01-07
Nguyen, Nam (Department: 1741)
Chemistry: electrical and wave energy
Apparatus
Electrolytic
C204S275100, C204S284000
Reexamination Certificate
active
06503375
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to an apparatus and process for deposition of a metal layer onto a substrate. More particularly, the present invention relates to a process for forming a doped metal layer on a conductive substrate by an electroplating process.
2. Background of the Related Art
Reliably producing sub-half micron and smaller features is one of the key technologies for the next generation of very large scale integration (VLSI) and ultra large scale integration (ULSI) integrated circuits. However, as the fringes of circuit technology are pressed, the shrinking dimensions of interconnects in VLSI and ULSI technology has placed additional demands on the processing capabilities. The multilevel interconnects that lie at the heart of this technology require careful processing of high aspect ratio features, such as vias and other interconnects. Reliable formation of these interconnects is very important to the VLSI and ULSI success and to the continued effort to increase circuit density and quality of individual substrates and die.
As circuit densities increase, the widths of vias, contacts and other features, as well as the dielectric materials between them, decrease to sub-micron dimensions, whereas the thickness of the dielectric layers remains substantially constant, with the result that the aspect ratios for the features, i.e., their height divided by width, increases. Many traditional deposition processes have difficulty filling sub-micron structures where the aspect ratio exceeds 2:1, and particularly where it exceeds 4:1. Therefore, there is a great amount of ongoing effort being directed at the formation of substantially void-free, sub-micron features having high aspect ratios.
Elemental aluminum (Al) and its alloys have been the traditional metals used to form substrate features. Such as lines, contacts, interconnects, and plugs in semiconductor processing because of aluminum's perceived low electrical resistivity, aluminum's superior adhesion to silicon dioxide (SiO
2
), the ease of patterning aluminum, and the ability to obtain aluminum in a highly pure form. However, aluminum has a higher electrical resistivity than other more conductive metals such as copper, and aluminum also can suffer from electromigration leading to the formation of voids in the conductor.
Copper and its alloys have lower resistivities than aluminum (1.7 &OHgr;-cm compared to 3.1 &OHgr;-cm for aluminum), with a higher current carrying capacity and significantly higher electromigration resistance as compared to aluminum. These characteristics are important for supporting the higher current densities experienced at high levels of integration and increase device speed. Copper also has good thermal conductivity and is available in a highly pure state. Therefore, copper is becoming the preferred metal for filling sub-quarter micron, high aspect ratio interconnect features on semiconductor substrates.
Despite the desirability of using copper for semiconductor device fabrication, choices of methods for depositing copper into features having high aspect ratios, such as a 10:1 aspect ratio, 0.25 &mgr;m wide vias, are limited. In the past, chemical vapor deposition (CVD) and physical vapor deposition (PVD) were the preferred processes for depositing electrically conductive material into the contacts, vias, lines, or other features formed on the substrate. However, for copper applications, CVD copper processes require copper containing precursors which have less than desirable deposition results and are still being developed, and PVD copper processes have faced many difficulties for depositing films in very small features. As a result of the obstacles faced in PVD and CVD copper deposition, electroplating, which had previously been limited to the circuit board fabrication, is being used to fill high aspect ratio features of substrates.
However, even electroplating has its own challenges for IC manufacturing processes. Certain electroplating deposition processes involve conformally depositing a thin electrically conductive seed layer, such as a copper layer, on a conductive substrate. In depositing the thin seed layer on the conductive substrate, the electroplated deposition process for certain conductive materials, such as copper, does not typically plate the seed layer evenly across the substrate surface. It is contemplated that one reason for this is that the high surface diffusivity of copper causes the uneven deposited copper material to agglomerate. The uneven deposition and agglomeration of the copper material is detrimental to circuit uniformity, conductivity, and reliability. Furthermore, the unevenness and agglomeration of the layer also reduces the effective adhesion of the copper material to the substrate and reduces the ability of subsequent layers to adequately bond to the copper material. Film agglomeration may also lead to improper filling of voids by “bridging” over substrate feature openings, thereby resulting in void formation and other discontinuities within the substrate features. Void formations in substrate features may detrimentally affect the performance of a semi-conductor device, and may even lead to device failure. Furthermore, if the electroplated seed layer is unevenly deposited on the substrate, then the current will not be evenly distributed over the surface of the seed layer and may result in non-uniform deposition of subsequent electrochemical deposited layers on the substrate.
Additionally, it has been discovered that some materials used in electroplating are prone to have unwanted side reactions during or after the deposition process. For example, copper, a frequently used seed layer material, is highly susceptible to oxidation. The oxidation of a metal layer may interfere with the adhesion of metal layers to adjacent layers, can detrimentally affect the conductivity of the metal feature, and may reduce the reliability of the overall circuit. Further, in some electroplating processes, a electroplating cell may contain a consumable anode of the same material as the deposited film, i.e., a copper anode for a copper film, and therefore, the anode may also be subjected to oxidation and form an oxide film on the surface of the anode. This oxide film can lead to less than desirable electroplating cell performance; and in the case of copper, excessive dissolution of the copper anode which may produce contaminants or particulate matter that may then be deposited on the substrate. Additionally, additives to the electroplating solution, such as those that provide for increased deposition or impart desired properties to a deposited substrate layer, may also be oxidized, thereby minimizing the additives effectiveness and potentially producing contaminants in the electroplating solutions.
Furthermore, in some processes, oxygen is a byproduct of the electrochemical deposition process and therefore cannot be easily minimized by agents external to the process. Thus, even carefully controlled environments may contain oxygen that may oxidize copper or other conductive materials, such as aluminum, to the detriment of the circuit and electroplating cell. Further, for some substrate feature forming processes, the substrate may be transferred between processing systems exposing the substrate to contaminants which may induce oxidation of the copper layers on the substrate following electroplating deposition.
Therefore, there is a need for an improved deposition process and apparatus that overcomes one or more of the difficulties in electroplating substrates. As discussed below, preferred embodiments of the invention reduce film agglomeration, reduce the formation of voids in features produced from electrochemical processes and/or reduce unwanted oxidation of metal films during and/or following deposition of the metal films on the features of a substrate. Preferably, the process and apparatus of the invention would provide for a more even deposition on a substrate surface and improve interlayer adhesion of deposited
Maydan Dan
Sinha Ashok K.
Applied Materials Inc
Moser Patterson & Sheridan
Nguyen Nam
Nicolas Wesley A.
LandOfFree
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