Anti-fuse circuit and method of operation

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – Fusible link or intentional destruct circuit

Reexamination Certificate

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Details

C327S567000, C365S225700, C361S056000

Reexamination Certificate

active

06597234

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to integrated circuits and more particularly to fusing techniques including anti-fuse circuits useful in integrated circuits.
RELATED ART
It is common in memory integrated circuits to have redundancy that is implemented using fuse technology. The fuse technology is required in order to replace redundant rows or columns with rows and columns from the regular array that have been found to be defective. With more modern technology utilizing copper as the interconnect layers, especially at the higher levels in the integrated circuit, there have been found to be difficulties in using copper fuses. The last layer of copper is typically the thickest. When a laser is utilized to blow a copper fuse at this thicker level, there is some difficulty in blowing the fuse because the laser pulse is absorbed by only the upper portion of the copper, and the rest of the copper is blown by heat from conduction. Because of the requirement or the result that conduction is involved in blowing the fuse, there have been difficulties in ensuring that the entire copper line has been completely opened. Another difficulty in blowing copper is that it has a high degree of reflection so that very high intensity is required for the laser. Inherent in the copper blowing process is that it requires additional expense.
Another technique is to electrically blow polysilicon. Typical polysilicon has a salicide over the top of it that is difficult to blow completely. This technique relies on a change in resistance that is not nearly as great as that between something that is a short and an open. In the case of the salicide covered polysilicon the change in resistance that occurs may be difficult to detect.
Thus there is a need for a fuse technology which is compatible with the most advanced interconnect technologies and does not have the problems associated with polysilicon.


REFERENCES:
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patent: 5442589 (1995-08-01), Kowalski
patent: 5844298 (1998-12-01), Smith et al.
Alavi et al., “A PROM Element Based on Salicide Agglomeration of Poly Fuses in a CMOS Logic Process,” IEEE International Electron Devices Meeting, Dec. 1997, 4 pgs.
Chiba et al., “Application of Field Programmable Gate Arrays to Space Projects,” Proceedings Third ESA Electronic Components Conference, ESTEC, Noordwijk, The Netherlands, pp. 471-474 (1997).
Comer, “Zener Zap Anti-Fuse Trim in VLSI Circuits,” VLSI Design, vol. 5, No. 1, pp. 89-100 (1996).
Cho et al., “A New Field Programmable Gate Array: Architecture and Implementation,” ETRI Journal, vol. 17, No. 2, pp. 21-30 (1995).
“Technology Focus A Reflow Model for the Anti-Fuse,” Electronic Engineering, pp. 31-40 (1991).
“IBM Technical Disclosure Bulletin,” vol. 27, No. 10A, pp. 5715-5716, Mar. 1985.

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