Method of forming a semiconductor device by simultaneously...

Details Method of forming a semiconductor device by simultaneously... Method of forming a semiconductor device by simultaneously...

2000-10-04

2003-07-15

Gulakowski, Randy (Department: 1746)

Cleaning and liquid contact with solids

Processes

For metallic, siliceous, or calcareous basework, including...

C134S001300, C134S002000, C134S010000, C134S025100, C427S378000, C427S377000, C427S443200, C510S175000, C510S181000, C510S197000

Reexamination Certificate

active

06592677

ABSTRACT:

The present invention relates to a method of forming a semiconductor device, and more particularly to a method of forming a semiconductor device having Cu-films serving as electrodes and interconnections as well as a cleaning method for avoiding the semiconductor device from Cu-metal contamination.
Cu is available as a conductive film for an electrode or an interconnection in a semiconductor device.
FIG. 1
is a fragmentary cross sectional elevation view illustrative of a semiconductor device having Cu-interconnections to describe the conventional method of forming the semiconductor device. A semiconductor substrate
9
has a transistor not illustrated on a surface thereof. An inter-layer insulator
2
is then formed on the semiconductor substrate
9
. Interconnections
8
are formed in the inter-layer insulator
2
. The interconnections
8
are separated by the inter-layer insulator
2
from the semiconductor substrate
9
. Each of the interconnections
8
may be formed as follows. Interconnection grooves
3
are selectively formed in the inter-layer insulator
2
by a selective etching process to the inter-layer insulator
2
. A barrier metal layer
4
of TaN, Ta or TiN is deposited by a sputtering method. A seed Cu-layer
5
is also deposited on the barrier metal layer
4
by a sputtering method. A Cu-plating process is carried out to grow the seed Cu-layer up
5
up to a Cu-plated layer
6
which completely fill the interconnection grooves
3
. The Cu-plated layer
6
comprises a moisture-containing polycrystal. An anneal is carried out to case a crystallization so that the moisture-containing polycrystal Cu-plated layer
6
becomes a single crystal Cu-layer
6
thereby to form a wafer. A chemical mechanical polishing is carried out to selectively remove the barrier metal layer
4
, the seed Cu-layer
5
and the Cu-plated layer
6
to leave them within the interconnection grooves
3
, whereby a planarized top surface of the inter-layer insulator
2
is shown, thereby to form interconnections
8
within the interconnection grooves
3
. A cleaning process is then carried out to the wafer
1
in order to remove the used polishing agent and contaminations of metals such as Cu from the surface of the wafer
1
.
In the Cu-plating process, Cu is grown not only on the top surface of the wafer
1
but also on the bottom surface thereof. Further, Cu atoms are adhered on the bottom surface of the semiconductor substrate
9
and then diffused into the semiconductor substrate
9
, whereby the diffused Cu atoms serve as contamination which deteriorates the device performance and characteristics. In order to prevent this problem, a pre-cleaning process is carried out to remove the Cu-metal contamination from the bottom surface of the semiconductor substrate
9
. The known pre-cleaning process is an RCA cleaning method which uses a cleaning solution such as FPM (HF/H
2
O
2
/H
2
). The bottom surface of the wafer
1
is cleaned with the FPM to remove not only the Cu-metal contamination therefrom but also a silicon oxide film on the bottom surface of the wafer, whereby the bottom surface of the wafer becomes hydrophobic. The wafer is also cleaned after the chemical mechanical polishing process. However, the cleaning solution is not uniformly in contact with the bottom surface of the wafer, thereby deteriorating the cleaning effect. Further, if the FPM cleaning solution is once in contact with the Cu-interconnections, this causes dissolution and/or corrosion of a surface of the Cu-interconnections, resulting in that the resistance of the interconnection is increased or the interconnection is disconnected.
In order to obtain the effect of cleaning the wafer after the chemical mechanical polishing process, it is preferable that the wafer bottom surface is hydrophilic. The contamination by the chemical mechanical polishing process is in the form of an insulator, for example, slurry, which is like to adhere onto the hydrophobic silicon surface due to opposite electrical polarity. If, however, the silicon surface is oxidized to change the property to a hydrophilic property, then the contamination insulator is unlikely to be adhered onto the hydrophilic silicon oxide surface. In Japanese patent No. 2586319, it is disclosed that O
2
plasma treatment is carried out to form a silicon oxide film on the wafer bottom surface so that the wafer bottom surface has the hydrophilic property. The O
2
plasma treatment is effective to a wafer having a refractory metal interconnection structure, but ineffective to the wafer having Cu-interconnection structure because Cu is oxidized by O
2
plasma, thereby to increase the resistance of the Cu-interconnection.
As described above, the wafer bottom surface is subjected to the Cu-contamination in the Cu-plating process. The Cu-contamination deteriorates the device performances or characteristics. If to remove the Cu-contamination, the FPM cleaning solution containing HF is used, then the wafer surface, except for the Cu-plated layer becomes hydrophobic, thereby making it difficult to remove the insulative contamination such as slurry adhered in the chemical mechanical polishing process. In order to change the hydrophobic property of the wafer bottom surface into hydrophilic property by the oxygen plasma treatment, the Cu-interconnection is oxidized thereby to increase the resistance of the Cu-interconnection.
In the above circumstances, it had been required to develop a novel method of forming a semiconductor device free from the above problem.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a novel method of forming a semiconductor device free from the above problems.
It is a further object of the present invention to provide a novel method of forming a semiconductor device, which allows removing Cu-contamination from a wafer bottom surface and also changing the wafer bottom surface to have a hydrophilicity.
The first present invention provides a method of removing a Cu-contamination from a wafer surface having a Cu-based metal region, comprising the step of: carrying out a cleaning process by use of a cleaning solution free of HF and capable of oxidation of the wafer surface for not only removing the Cu-contamination from the wafer surface but also oxidizing the wafer surface to cause the wafer surface to have a hydrophilicity.
The above and other objects, features and advantages of the present invention will be apparent from the following descriptions.


REFERENCES:
patent: 5714203 (1998-02-01), Schellenberger
patent: 6080709 (2000-07-01), Ishikawa et al.
patent: 6117775 (2000-09-01), Kondo et al.
patent: 6117783 (2000-09-01), Small et al.
patent: 6423148 (2002-07-01), Aoki
“Monthly Semiconductor World”, Apr. 1999, pp. 35-39.
“Technical Materials Edition, Semiconductor Seminar - Problems Point with the Semiconductor Wet Wash Mechanism and the Current State of Wet Washing”; 3. Accomplishment of both high cleansing levels and low cost through highly functional wash materials; pp. 1-3., Apr. 1999.
Advanced electronics series 1-15 “Ultra-clean ULSI technology”, pp. 190-195., Nov. 20, 1997.

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