Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Reexamination Certificate
2001-09-19
2003-07-08
Nguyen, Cuong Quang (Department: 2811)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
Reexamination Certificate
active
06589819
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to microelectronic packages having leads or traces and specifically relates to microelectronic packages having arrays of resilient leads and methods of making such microelectronic packages.
BACKGROUND OF THE INVENTION
Complex microelectronic devices such as semiconductor chips typically require numerous connections to other electronic components. For example, a complex device including a semiconductor chip may require hundreds of electrical connections between the chip and one or more external devices. These electrical connections may be made using several alternative methods, including wire bonding, tape automated bonding and flip-chip bonding. Each of these techniques presents various problems including difficulty in testing the chip after bonding, long lead lengths, large areas occupied by the chip on a microelectronic assembly, and fatigue of the connections due to changes in size of the chip and the substrate during thermal expansion and contraction.
In many microelectronic devices, it is desirable to provide an electrical connection between components that can accommodate relative movement between the components. For example, where a semiconductor chip is mounted to a circuit board, thermal expansion and contraction of the chip and circuit board can cause the contacts on the chip to move relative to contacts on the circuit board. This movement can occur during operation of the device and can also occur during manufacturing operations (e.g. when soldering the chip to the circuit board).
One structure that has been used to successfully address these problems is commonly referred to as an “interposer” or “chip carrier”, such as that shown in certain preferred embodiments of commonly assigned U.S. Pat. Nos. 5,148,265, 5,148,266 and 5,455,390, the disclosures of which are hereby incorporated by reference herein. Interposers typically include a flexible, sheet-like element having a plurality of terminals disposed thereon, and including flexible leads used to connect the terminals with contacts on a microelectronic element, such as a semiconductor chip or wafer. The flexible leads permit thermal expansion of the various components without inducing stresses in the connection. The terminals of the interposer may then be used to test the assembly, and/or permanently attach the assembly to another microelectronic element.
A compliant layer may be disposed between a microelectronic element and the interposer. The compliant layer typically encapsulates the leads connecting the interposer and microelectronic element and facilitates connection of the terminals to a test device and/or to the final electronic assembly by compensating for variations in component flatness and terminal heights.
As illustrated in certain preferred embodiments of commonly assigned U.S. Pat. No. 5,518,964 (“the '964 patent”), the disclosure of which is hereby incorporated by reference herein, an array of moveable electrical connections between two microelectronic elements, such as a semiconductor chip and a substrate, can be provided by first connecting leads between the microelectronic elements and then moving the elements away from one another through a predetermined displacement so as to bend the leads. One of the microelectronic elements may be a connection component including a dielectric body having leads extending along a surface of the dielectric body. The leads may have first ends permanently attached to the dielectric body and second ends releasably attached to the dielectric body. The dielectric body, with the leads thereon, may be juxtaposed with a semiconductor chip having contacts and the second releasable ends of the leads may be bonded to the contacts on the chip. Following bonding, the dielectric body and chip are moved away from one another, thereby bending the leads toward a vertically extensive disposition. During or after movement, a curable material such as a liquid composition may be introduced between the elements. The curable material may then be cured, such as by using heat, to form a compliant dielectric layer surrounding the leads. The resulting semiconductor chip package has terminals on the dielectric body or connection component which are electrically connected to the contacts on the chip, but which can move relative to the chip so as to compensate for thermal effects. For example, the semiconductor chip package may be mounted to a circuit board by solder-bonding the terminals to conductive pads on the circuit board. Relative movement between the circuit board and the chip due to thermal effects is allowed by the moveable interconnection provided by the leads and the compliant layer.
In other embodiments of the '964 patent, the package-forming process can be conducted on a wafer scale, so that all of the semiconductor chips in a wafer may be connected to connection components in a single step. The resulting wafer package is then severed so as to provide individual units, each including one or more of the chips and a portion of the dielectric body. The above-described leads may be formed on the chip or wafer, rather than on the dielectric body. In further embodiments of the '964 patent, a dielectric body having terminals and leads is connected to terminal structures on a temporary sheet. The temporary sheet and dielectric body are moved away from one another so as to vertically extend the leads, and a curable liquid material is introduced around the leads and cured so as to form a compliant layer between the temporary sheet and the dielectric body. The temporary sheet is then removed, leaving the tip ends of the terminal structures projecting from a surface of the compliant layer. Such a component, commonly referred to as a connection component, may be used between two other components. For example, the terminal structures may be engaged with a semiconductor chip and the terminals engaged with a circuit panel or other microelectronic component.
In certain preferred embodiments of commonly assigned U.S. Pat. No. 6,117,694, the disclosure of which is hereby incorporated herein by reference, a microelectronic component, such as a connector or a packaged semiconductor device, is made by connecting multiple leads between a pair of elements and moving the elements away from one another so as to bend the leads toward a vertically extensive disposition. One of the elements may include a temporary support that may be removed after bending the leads
After the leads interconnect the microelectronic elements, an encapsulant, such as a flowable, curable dielectric material, may be injected between the microelectronic elements. The encapsulant may be injected between the microelectronic elements immediately after bonding, whereby the force of the pressurized encapsulant acting on the elements separates them and bends the leads, forming a compliant lead configuration. Alternatively, the leads may be formed before injecting the encapsulant by retaining the elements against moveable platens by vacuum, and moving the platens with respect to each other, bending and forming the leads. The encapsulant is then injected while the dielectric sheet and the wafer are in their displaced positions.
After the flowable, curable dielectric material has been cured, the microelectronic assembly may be removed from the fixture, trimmed and tested. The fixture may then be reused to perform the above operations on the next microelectronic assembly.
Despite these and other advances in the art, still further improvements would be desirable.
SUMMARY OF THE INVENTION
In accordance with certain preferred embodiments of the present invention, a method of making a microelectronic package having an array of resilient leads includes providing a first element having a plurality of conductive leads on a first surface thereof. The conductive leads preferably have terminals ends permanently attached to the first element and tip ends remote from the terminal ends, the tip ends of the conductive leads being movable relative to the terminal ends. The method prefer
McWilliams Bruce
Smith John W.
Lerner David Littenberg Krumholz & Mentlik LLP
Nguyen Cuong Quang
Tessera Inc.
LandOfFree
Microelectronic packages having an array of resilient leads... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Microelectronic packages having an array of resilient leads..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Microelectronic packages having an array of resilient leads... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3040974