Amplifiers – With semiconductor amplifying device – Including differential amplifier
Reexamination Certificate
2001-12-12
2003-05-06
Tokar, Michael (Department: 2819)
Amplifiers
With semiconductor amplifying device
Including differential amplifier
C330S009000, C330S051000, C330S253000, C330S159000, C330S254000, C330S261000, C326S115000, C326S050000, C326S121000, C326S017000, C326S112000, C327S065000, C327S427000, C327S563000
Reexamination Certificate
active
06559719
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an amplifier and an image pickup device, and more particularly to an amplifier and an image pickup device in which a power consumed by the amplifier and an electric characteristic hardly change while a 1/f noise generated from a transistor that constitutes a circuit is reduced.
2. Related Background Art
FIG. 1
shows a conventional differential amplifier using a MOS transistor. Differential input signal voltages applied to the inverse and non-inverse input terminals which are connected to the respective gate terminals of MOS transistors M
1
and M
2
, by a differential input stage that is connected with the respective source terminals of the MOS transistors Ml and M
2
are converted into signal currents, and the signal currents are transmitted by a current mirror circuit composed of MOS transistors M
3
to M
10
and are then added to a current that is inverted by a current mirror circuit composed of MOS transistors M
11
to M
14
at a node A, and then converted into a signal voltage by an impedance and a load resistor accompanied by the node A and finally outputted from an output terminal
The largest sources that generate random noises that appears in the output terminal
10
of the differential amplifier are the MOS transistors M
1
and M
2
that appear to be input transistors from the view point of transfer function up to the output terminal
10
, and the MOS transistors M
1
and M
2
generally are a main generation sources of a noise that has a larger spectrum with respect to a lower frequency called “1/f noise” that is classified as one kind of the random noise.
As a means normally used to reduce the 1/f noise, the product (area) of the gate lengths L of the MOS transistors M
1
and M
2
and the gate width W are made large since the 1/f noise is represented by the following expression:
Vn
2
=K
/(
W·L·Cox·f
)
Because the electric characteristic of the differential amplifier largely depends on the dimensions and characteristics of the input transistors M
1
and M
2
, the electric characteristics are not normally designed in view of the 1/f noise alone, but determined in accordance with the their trade-off. Therefore, there are many cases in which it is difficult to change the gate dimensions of the input transistor to reduce the 1/f noises, after the differential amplifier that satisfies the required specification has been designed.
FIG. 2
shows a conventional example (of structure) different from that of
FIG. 1
, a type called “folded cascode”, which is identical with that of
FIG. 1
except that MOS transistors M
3
and M
4
function as current sources, become active loads and transmit signal currents to the output stage through the common gate stages of the MOS transistors M
5
and M
6
.
As a method of reducing the 1/f noise of the MOS transistor, there are disclosed “1/f noise reduction of metal-oxide-semiconductor transistors by cycling from inversion to accumulation” in Applied Physics Letters Apr. 15, 1991 p.1664 to p.1667.
This is designed such that the MOS transistor is switched between two states of on and off to reduce the 1/f noise per se.
FIG. 3
shows the 1/f noise measurement example in case of the duty cycle 50% (IEEE Journal of Solid-State Circuits, vol35, N07, JULY 2000, “Reducing MOSFET 1/f Noise and Power Consumption by Switched Biasing”). In this feature, 0V denotes a point at which the voltage of the gate that results in the above off state is 0V, and the 1/f noise spectrum is further lower than a value obtained by a modulation theory by about 8 db.
When this result is applied to the conventional differential amplifier, a period of time during which the input transistor turns off may occur and thus its output appears to be an intermittent waveform. This is unacceptable because the output of the differential amplifier needs to deal with continuous signals temporarily.
SUMMARY OF THE INVENTION
An object of the present invention is to provide an amplifier in which an influence of 1/f noise is controlled.
In order to attain the above-mentioned object, according to one aspect of the present invention, there is provided an amplifier comprising: differential input transistors; first switches arranged between each control electrode and main electrode (e.g., gate and source in the case of a field-effect transistor) of the differential input transistors; a second switch arranged to turn on/off a current source that gives a bias of the differential input transistors; and a drive circuit arranged to turn off the second switch and turn on/off the first switches when the current of the current source is not supplied to the differential input transistors.
According to an another aspect of the present invention, there is provided an amplifier comprising:
differential input transistors;
first switches arranged between each control electrode and main electrode of the differential input transistors; a capacitor arranged to hold an output signal of the differential input transistors; a second switch arranged to electrically connect the differential input transistors with the capacitor; and a drive circuit arranged to turn on the first switches in a state in which the second switch is turned off.
The other objects and features of the present invention will become apparent from the following specification and the accompanying drawings.
REFERENCES:
patent: 5349595 (1994-09-01), Ogawa et al.
patent: 5621339 (1997-04-01), Kerth et al.
patent: 6008670 (1999-12-01), Pace et al.
patent: 6057716 (2000-05-01), Dinteman et al.
patent: 6087873 (2000-07-01), Alexander
patent: 6157257 (2000-12-01), Murphy
patent: 6384682 (2002-05-01), Maeda
Bloom, et al., “1/f Noise Reduction of Metal-Oxide-Semiconductor Transistors by Cycling from Inversion to Accumulation,” American Institute of Physics, Applied Physics Letters No. 58, vol. 15, pp. 1664-1666, Apr. 15, 1991.
Klumperink, et al., “Reducing MOSFET 1/f Noise and Power Consumption by Switched Biasing,” IEEE Journal of Solid-State Circuits, vol. 35, No. 7, Jul. 2000.
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