PLL circuit including a DC power source alarm

Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements

Reexamination Certificate

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C331S025000

Reexamination Certificate

active

06566965

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a Phase Locked Loop circuit (PLL circuit).
2. Description of the Related Art
In some cases, the phase of a signal output from a PLL (Phase Locked Loop) circuit cannot be locked to a predetermined phase. One cause of this problem is that the electric potential (or voltage) of a direct-current power source (DC power source) for driving the PLL circuit fluctuates.
If the phase of the signal output from the PLL circuit cannot be fixed, the phase of a signal output from, for example, a clock driver employing the PLL circuit cannot be fixed, either. Since the above problem causes such malfunction of a device employing the PLL circuit, a technique for solving the above problem caused in the PLL circuit has been requested.
In Unexamined Japanese Patent Application KOKAI Publication No. S57-59425, a technique for preventing an alarm indicating circuit from malfunctioning, in a case where a voltage of a power source for the alarm indicating circuit suddenly changes, is disclosed. This technique prevents a signal for issuing an alarm from being supplied to the alarm indicating circuit, in a case where the voltage of the power source suddenly changes. Thus, the alarm indicating circuit does not work because no signal is supplied thereto, in the case where the voltage of the power source suddenly changes.
As described, since the alarm indicating circuit does not work in the case where the power source voltage suddenly changes according to the technique disclosed in Unexamined Japanese Patent Application KOKAI Publication No. S57-59425, the sudden change of the power source voltage (or electric potential) cannot be notified. Therefore, the above problem caused in the PLL circuit cannot be solved by the technique disclosed in this publication.
In Unexamined Japanese Patent Application KOKAI Publication No. S61-822, a circuit for issuing an alarm in a case where any fluctuation of a voltage of an alternating-current power source is detected, is disclosed. This circuit comprises a circuit for holding the peak of an alternating-current voltage, and a circuit for indicating an alarm in a case where the peak voltage is out of a predefined range. The circuit for indicating an alarm includes a micro processor.
The circuit disclosed in Unexamined Japanese Patent Application KOKAI Publication No. S61-822 can hold the peak of the alternating-current voltage, but cannot detect fluctuation of a voltage that is caused wherever other than at the peak. Therefore, it is inappropriate to use the circuit disclosed in this publication, for detecting fluctuation of an electric potential of, for example, a DC power source connected to the PLL circuit.
And since the circuit disclosed in Unexamined Japanese Patent Application KOKAI Publication No. S61-822 employs a micro processor as described above, the circuit becomes complicated, and costs too much.
The contents of Unexamined Japanese Patent Application KOKAI Publication No. S57-59425 and Unexamined Japanese Patent Application KOKAI Publication No. S61-822 are incorporated herein by reference.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a simply-structured and low-costing phase locked loop circuit which gives an alarm in a case where fluctuation of a potential of a direct-current power source is caused.
To accomplish the above object, a phase locked loop circuit of the present invention generates a second signal having a predetermined frequency and a predetermined phase based on a first signal supplied thereto, and comprises an alarm circuit which gives an alarm in a case where fluctuation of a potential of a direct-current power source which is connected to the phase locked loop circuit exceeds a predefined range.
According to this invention, a simply-structured and low-costing phase locked loop circuit which gives an alarm in a case where fluctuation of a potential of a direct-current power source is caused, can be provided.
The alarm circuit may comprise:
an alarm issuer which issues an alarm, by being supplied with a drive voltage; and
a voltage supply circuit which supplies the drive voltage to the alarm issuer in a case where the fluctuation exceeds the predefined range.
The voltage supply circuit may comprise:
an alarm power source which supplies the drive voltage; and
a control circuit which controls supply of the drive voltage from the alarm power source to the alarm issuer.
The control circuit may comprise:
a first potential generation circuit which generates a first potential which is higher than a steady-state potential of the direct-current power source;
a second potential generation circuit which generates a second potential which is lower than the steady-state potential of the direct-current power source;
a first comparator circuit which extracts a local maximum potential of a fluctuating potential of the direct-current power source, and compares the extracted local maximum potential with the first potential;
a second comparator circuit which extracts a local minimum potential of the fluctuating potential of the direct-current power source, and compares the extracted local minimum potential with the second potential; and
a supply circuit which supplies the drive voltage to the alarm issuer based on a comparison result obtained by the first comparator circuit and a comparison result obtained by the second comparator circuit.
The supply circuit may supply the drive voltage to the alarm issuer, in a case where the local maximum potential is higher than the first potential, and/or the local minimum potential is lower than the second potential.
The first potential and the second potential may respectively be set, so that a range between the first potential and the second potential is defined within a range in which the phase locked loop circuit can lock a phase of the second signal to the predetermined phase.
The alarm issuer may comprise a light emitting diode, and issues an alarm by turning on the light emitting diode.


REFERENCES:
patent: 4120229 (1978-10-01), Ota
patent: 4509201 (1985-04-01), Sekigawa et al.
patent: 4902960 (1990-02-01), Lowenstein et al.
patent: 57-59425 (1982-04-01), None
patent: 61-822 (1986-01-01), None

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