Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure – Plural non-isolated transistor structures in same structure
Reexamination Certificate
2000-09-27
2003-05-13
Pham, Long (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Bipolar transistor structure
Plural non-isolated transistor structures in same structure
C257S577000, C438S335000
Reexamination Certificate
active
06563193
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
This application is based upon and claims the benefit of priority from the prior Japanese Patent Applications No. 11-274001, filed Sep. 28, 1999; and No. 11-277454, filed Sep. 29, 1999, the entire contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device, and more particularly to a high voltage lateral bipolar transistor which is suitable for the incorporation into an integrated circuit.
Conventionally, a lateral bipolar transistor is formed on an SOI (silicon on insulator) so that a high voltage semiconductor device is formed.
FIGS. 1A and 1B
are a plan view and a sectional view showing such conventional lateral bipolar transistors.
As shown in
FIGS. 1A and 1B
, a buried oxide layer
52
is formed on a semiconductor substrate
51
on which a high-resistance n-type active layer
53
is formed. On a surface of the n-type active layer
53
, an n-type diffusion layer
56
is formed. On the surface of this n-type diffusion layer
56
, a low-resistance base contact layer
58
, a p-type collector layer
59
and a p-type emitter layer
57
are selectively formed respectively. A base electrode
62
b
is formed on the n-type base contact layer
58
, a collector electrode
62
c
is formed on the p-type collector layer
59
, and an emitter electrode
62
a
is formed on the p-type emitter layer
57
, respectively.
Incidentally, reference numeral
60
a
denotes a LOCOS (local oxidation of silicon) film. Reference numeral
60
b
denotes a thermal oxide film. On these oxide films, an insulation film
61
is formed. On the n-type active layer
53
, a trench
53
a
is formed. In this trench
53
a,
a polycrystal silicon layer
55
is buried via the insulation layer
54
so that an isolation region is formed.
With the lateral bipolar transistor having such a structure, an impurity distribution of the n-type diffusion layer
56
forms a profile so that the concentration is high on the surface thereof, and the concentration becomes low as the depth becomes deeper. As a consequence, the current density injected from the p-type emitter layer
57
becomes high at the portion deeper than the surface portion.
Consequently, in the case where the potential of the semiconductor substrate
51
is changed with respect to the n-type active layer
53
, for example, when the potential of the semiconductor substrate
51
becomes a negative value with respect to the n-type active layer
53
, there arises a problem that a p-type inversion layer is formed on an interface between the buried oxide film
52
and the n-type active layer
53
, and a resistance of the current channel of the hole current is remarkably lowered with the result that the characteristic such as hFE or the collector current dependency on the voltage between the emitter and the collector depends on the potential of the semiconductor substrate
51
.
By the way, in order to improve the breakdown voltage of the conventional PNP-type lateral bipolar transistor, a depletion layer is widened to the base side generally by lowering an impurity concentration in the base region to reduce an electric field. However, the following problem is generated when the impurity concentration in the base region is lowered. That is, there arises a problem that the base width modulation effect is conspicuously generated wherein the base width is gradually decreased with an electric field from the collector side so that the gain is changed, with the result that the Early voltage is lowered. For example, the deterioration in the circuit performance occurs when an analog circuit is formed of transistors having a low Early voltage. As one example, there can be given a fact that the gain is lowered when a transistor which has a low Early voltage is used in a comparator. Incidentally, the Early voltage will be described later, but the Early voltage is a voltage value at a point where an abscissa intersects a straight line extended from the straight line of the collector current in the active region when the voltage between the collector and emitter is assigned to an abscissa and a collector current is assigned to an ordinate of a graph.
BRIEF SUMMARY OF THE INVENTION
A first object of the present invention is to provide a structure of a semiconductor device wherein the characteristic such as hFE or the like does not depend on the potential of the semiconductor substrate.
A second object of the present invention is to provide a lateral bipolar transistor having a high Early voltage wherein the base width modulation effect is suppressed while a breakdown voltage is maintained.
In order to attain the above object, the semiconductor device according to a first aspect of the invention comprises:
a substrate a surface of which is formed of an insulation region;
a high resistance active layer of a first conductivity type formed on the surface of the substrate;
a semiconductor region of the first conductivity type having an impurity concentration higher than that of the active layer of the first conductivity type and selectively formed on a surface of the active layer of the first conductivity type;
an emitter region of a second conductivity type selectively formed on the semiconductor region of the first conductivity type;
a collector region of the second conductivity type selectively formed on the surface of the active layer of the first conductivity type in separation from the semiconductor region of the first conductivity type; and
a base contact region of the first conductivity type selectively formed on the surface of the active layer of the first conductivity type in separation from the emitter region and the collector region.
The semiconductor device according to a second aspect of the present invention comprises:
a substrate a surface of which is formed of an insulation region;
a high resistance active layer of a first conductivity type formed on the surface of the substrate;
a first semiconductor region of the first conductivity type having an impurity concentration higher than that of the active layer of the first conductivity type and selectively formed on a surface of the active layer of the first conductivity type;
an emitter region of a second conductivity type selectively formed on the surface of the first semiconductor region of the first conductivity type;
a collector region of the second conductivity type selectively formed on the surface of the active layer of the first conductivity type in separation from the first semiconductor region of the first conductivity type;
a second semiconductor region of the first conductivity type having an impurity concentration higher than of the active layer of the first conductivity type, and formed on the active layer of the first conductivity type in separation from the semiconductor region of the first conductivity type; and
a base contact region of the first conductivity type selectively formed on the surface of the second semiconductor region of the first conductivity type.
Furthermore, according to a third aspect of the present invention, the semiconductor device comprises:
a substrate a surface of which is formed of an insulation region;
a high resistance active layer of a first conductivity type formed on the surface of the substrate;
a semiconductor region of the first conductivity type having an impurity concentration higher than that of the active layer of the first conductivity type and selectively formed on a surface of the active layer of the first conductivity type;
an emitter region of a second conductivity type and a base contact region of a first conductivity type formed in separation from each other on the surface of the active layer of the first conductivity type; and
a collector region of the second conductivity type selectively formed on the surface of the active layer of the first conductivity type in separation from the semiconductor region of the first conductivity type.
It is desirable that the semiconductor device according to the first to third aspects of the present inventio
Kawaguchi Yusuke
Matsudai Tomoko
Nagano Hirofumi
Nakagawa Akio
Nakamura Kazutoshi
Farahani Dana
Kabushiki Kaisha Toshiba
Pham Long
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