Method and apparatus for locating exception correction routines

Details Method and apparatus for locating exception correction routines Method and apparatus for locating exception correction routines

1995-12-18

1998-07-28

Decady, Albert

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355387, 355571, 355591, G06F 1100

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057872414

ABSTRACT:
An apparatus for locating exception correction routines within a control ROM of a microprocessor. A control ROM generates micro instructions that are addressable by a microprocessor. A translator generates micro instructions that do not have addresses which may be referenced. Error correction routines must be provided for micro instructions whether they are provided by a translator, or by a control ROM. Exception correction routines are stored in a control ROM at fixed offsets relative to the micro instructions for which they provide correction. For translator generated micro instructions, an address corresponding to an appropriate exception correction routine is provided to the control ROM and latched. This address may later be read from the latch should an exception condition occur.

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