Electric lamp and discharge devices: systems – Current and/or voltage regulation
Reexamination Certificate
2001-08-06
2003-04-08
Wong, Don (Department: 2821)
Electric lamp and discharge devices: systems
Current and/or voltage regulation
C315S307000, C315S224000, C315SDIG007
Reexamination Certificate
active
06545432
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the general subject of circuits for powering discharge lamps. More particularly, the present invention relates to a ballast that includes a circuit for quickly detecting a lamp-out condition.
BACKGROUND OF THE INVENTION
Electronic ballasts that include an inverter and a series resonant type output circuit generally require some form of protection circuitry in order to prevent excessive power dissipation and/or damage due to the high voltages and currents that tend to result when a lamp fails or is removed. It is especially important that the protection circuitry quickly detect lamp failure or removal so that appropriate control action may be taken (e.g., shutting down the inverter) before the voltages and currents in the inverter and resonant circuit reach undesirably high levels.
There are many types of protection circuits in the prior art. These protection circuits may be classified according to the signals that are monitored in order to detect a lamp fault condition. In one group are “supply-side” approaches that are concerned with monitoring signals in the inverter portion of the ballast, such as the current through the inverter switches which is usually monitored via a current-sensing resistor placed in series with one of the inverter switches. Such circuits are most readily implemented in ballasts with driven, as opposed to self-oscillating, inverters. In another group are “load side” approaches that focus on signals at the ballast output and the lamp(s), such as the current that flows through the lamp(s) or the voltage that appears across a direct current (DC) blocking capacitor in series with the lamp(s). The present invention is intended as an alternative to existing approaches within this latter lass of protection circuits.
One known “load side” approach employs either a current transformer or current-sensing resistor that is placed in series with the lamp(s) in order to directly monitor the lamp current. However, both of these components have significant drawbacks. A current transformer is quite costly in terms of both material and ballast manufacturability. A current sensing resistor, while materially inexpensive, is significantly dissipative and thus undesirable from the standpoint of ballast energy efficiency.
Another known “load side” approach monitors the voltage across a direct current (DC) blocking capacitor in series with the lamp load. As illustrated in
FIG. 1
, a typical realization of this approach utilizes a resistor voltage divider arrangement (R
1
, R
2
) connected in parallel with the DC blocking capacitor (C
B
). The operation and limitations of this approach are discussed with reference to
FIGS. 1 and 2
as follows.
During normal operation, when the lamp load is conducting current in a normal manner, the voltage across C
B
has an average value of V
DC
/2 (e.g., 225 volts). V
OUT
is a highly scaled-down version of the voltage across C
B
, and is typically set to have an average value that is on the order of several volts (e.g., 5 volts) when the lamp load is operating normally. For the sake of later comparison, it is assumed that the inverter drive circuit is configured to turn the inverter off (or take some other type of protective action) when V
OUT
falls below a predetermined value (e.g., 2.5 volts).
If the lamp load is removed or fails to conduct current, C
B
is deprived of charging current and begins to discharge into R
1
and R
2
. Correspondingly, the voltage across C
B
, and hence V
OUT
, decreases. Once V
OUT
falls below a predetermined level (e.g., 2.5 volts), the inverter drive circuit senses that there is a lamp fault and takes appropriate control action (e.g., shuts down the inverter) in order to limit power dissipation and prevent damage to the ballast.
FIG. 2
is an approximate plot of V
OUT
for when the circuit of
FIG. 1
is realized with the following component and parameter values: V
DC
=450 volts, C
B
=0.1 microfarad, I
LAMP
=180 milliamperes (rms), R
1
=220 kilohms, R
2
=5.1 kilohms. During the period
0
<t<t
1
, the lamp load is operating normally and the voltage across C
B
is at its normal value of V
DC
/2=225 volts. Correspondingly, V
OUT
has an average (DC) value of approximately 5 volts; V
OUT
also includes a small amount of high frequency ripple. Upon occurrence of a lamp-out condition (i.e., removal of the lamp or failure of the lamp to conduct current) at time t
1
, the voltage across C
B
begins to decrease as a rate determined by the capacitance of C
B
and the sum of the resistances of R
1
and R
2
. After about 16 milliseconds, at t=t
2
, V
OUT
reaches about half (i.e., 2.5 volts) of its normal operating value (i.e., 5 volts), at which point the inverter drive circuit shuts down the inverter or shifts the inverter operating frequency to a value that is far enough removed from the natural resonant frequency of L
R
and C
R
so as to limit power dissipation and prevent undesirably high voltages and currents in the ballast.
In a real ballast, the inverter is normally operated at a frequency that is at or near the natural resonant frequency of L
R
and C
R
; for a number of practical reasons, this frequency is preferably set to be greater than 20,000 hertz. With such a high operating frequency, it does not take very long for the voltages and currents in the inverter and resonant circuit to reach damaging levels after a lamp fault occurs. For example, with an operating (and resonant) frequency of 40,000 hertz, the voltages and currents in the ballast will have reached undesirably levels within as few as 4-5 cycles (e.g., 100-125 microseconds) or so after occurrence of a lamp fault. Because 125 microseconds is far less than the 16 milliseconds that it takes for V
OUT
to fall to a level that indicates a lamp-out condition, this approach is not nearly fast enough to serve as a reliable protection circuit.
In the prior art circuit of
FIG. 1
, the time that it takes for V
OUT
to decrease by a given amount following a lamp-out condition is governed by C
B
, R
1
, and R
2
. Although the time may be shortened by decreasing the capacitance of C
B
and/or the sum of the resistances of R
1
and R
2
, there are other constraints that render this strategy impractical. First, because the minimum required capacitance of C
B
is dictated by the magnitude of I
LAMP
and other design considerations, a reduction in the capacitance of C
B
is generally not an option. Second, in order to prevent life-shortening migration effects in the lamp(s) due to the presence of a direct current (DC) component in I
LAMP
, the sum of the resistances of R
1
and R
2
must be large enough to limit the DC component of I
LAMP
to no more than one milliampere during normal operation of the lamp load. With R
1
+R
2
set to 225.1 kilohms and with V
DC
set to 450 volts (as in the present example), the DC component of I
LAMP
is approximately one milliampere. Any further reduction in R
1
+R
2
would cause the DC component to exceed one milliampere, which would be unacceptable. Thus, there is no apparent way in which to shorten the response time of the approach of
FIG. 1
without violating other important design constraints.
What is needed, therefore, is a ballast with a compact and cost-effective arrangement for quickly detecting and responding to lamp removal or failure, but without introducing excessive DC current through the lamps. A ballast with these features would represent a significant advance over the prior art.
REFERENCES:
patent: 5528147 (1996-06-01), Konopka
patent: 5767631 (1998-06-01), Konopka et al.
patent: 5770925 (1998-06-01), Konopka et al.
patent: 5869937 (1999-02-01), Konopka
patent: 5969483 (1999-10-01), Li et al.
patent: 5982109 (1999-11-01), Konopka et al.
patent: 5994847 (1999-11-01), Konopka
Labudda Kenneth D.
Osram Sylvania Inc.
Vo Tuyet T.
Wong Don
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