Surgery: light – thermal – and electrical application – Light – thermal – and electrical application – Electrical therapeutic systems
Reexamination Certificate
2000-11-03
2003-05-27
Wolfe, Willis R. (Department: 3747)
Surgery: light, thermal, and electrical application
Light, thermal, and electrical application
Electrical therapeutic systems
C029S025000, C029S003000, C216S006000, C216S033000
Reexamination Certificate
active
06571126
ABSTRACT:
TECHNICAL FIELD
The present invention concerns implant able medical devices, such as defibrillator and cardioverters, and more specifically to a method of manufacturing a capacitor stack for a flat capacitor.
BACKGROUND
Since the early 1980s, thousands of patients prone to irregular and sometimes life-threatening heart rhythms have had miniature heart monitors, particularly defibrillator and cardioverters, implanted in their bodies. These devices detect onset of abnormal heart rhythms and automatically apply corrective electrical therapy, specifically one or more bursts of electric current to the heart. When the bursts of electric current are properly sized and timed, they restore normal heart function without human intervention, sparing patients considerable discomfort and often saving their lives.
The typical defibrillator or cardioverter includes a set of electrical leads, which extend from a sealed housing into the wall of a heart after implantation. Within the housing are a battery for supplying power, monitoring circuitry for detecting abnormal heart rhythms, and a capacitor for delivering bursts of electric current through the leads to the heart.
Flat capacitors generally include a stack of flat capacitor elements, with each element including a paper separator between two sheets of aluminum foil. One of the foils serves as the anode of the capacitor element, and the other serves as the cathode.
One or more of the capacitor elements are often die cut in a shape designed to conform to a capacitor case. The cutting results in undesired residual stresses, and in warpage of the capacitor element. Stacking a plurality of these types of capacitor elements may result in increased height to the assembly. Moreover, the foil strip used to produce the capacitor element may not have the desired flatness prior to processing. Undesired residual stress due to this factor may also result in warpage of the capacitor assembly, enough to add height to the assembly. Moreover, the foils are cut using high-precision dies which are not only expensive, but require repeated sharpening. Another problem that arises is that cutting the foils can produce burrs on the cut edges of the foils. When edge burrs on adjacent anode and cathode foils contact each other, a conductive path results that short circuits the capacitive element.
Each anode foil in the stack, and each cathode foil in the stack, is interconnected to the other anodes and cathodes respectively. The anodes and cathodes generally include tabs which are crimped or welded together. Connecting the anodes and cathodes in this way provides a total capacitance equal to the sum of the capacitances of all the capacitor elements. However, the anode and cathode interconnections cause designers to increase the size of the capacitor case to accommodate tabs or to remove a portion of the capacitive elements, which reduces total capacitance or increases the size of the capacitor.
Moreover, since defibrillator and cardioverters are typically implanted in the left region of the chest or in the abdomen, a smaller size device, which is still capable of delivering the required level of electrical energy, is desirable.
Accordingly, there is a need for capacitor structures and methods of manufacture which provide greater process control, less expensive manufacturing, provide for a design efficiently utilizing space within the capacitor case, and provide for a compact capacitor design capable of providing the required pulse of energy for use within the implant able device.
SUMMARY
In one embodiment, a method of manufacturing a capacitor includes disposing one or more conductive layers of a first electrode stack in a recess of an alignment mechanism, where the recess is positioned relative to two or more alignment elements. The method further includes placing a separator over the one or more conductive layers where an outer edge of the separator contacts the two or more alignment elements. In addition, the method includes securing the aligned separator and conductive layers to one another to form an anode or a cathode stack.
In one embodiment, a method of manufacturing a capacitor includes providing an alignment mechanism having a plurality of alignment elements and a recess, each alignment element having a position corresponding to a point on the outer edge of either a first electrode stack or second electrode stack. The method further comprises aligning a portion of at least one first electrode stack relative to the recess and the alignment elements, and removing the aligned first electrode stack. In addition, the method further includes aligning a portion of at least one second electrode stack relative to a second alignment mechanism including a second recess and second alignment elements. The method further includes removing the aligned second electrode stack.
One aspect provides a multi-tab base foil layer for a flat capacitor. The base tabs of the base foil layer are spaced laterally along a vertical face of the capacitor stack. In addition to the base layer, the capacitor stack of foil layers includes secondary layers. The secondary layers have matching tabs that overlay the base tabs of the base layer. In one embodiment, this arrangement reduces the space required for connecting and routing the tab groups and this allows a reduction in the size of the capacitor, or alternatively an increase in its capacitance, or energy-storage capacity.
One aspect provides a capacitor stack structure that is more tolerant of edge burrs in the cut foil layers. In one embodiment, a capacitor with anode and cathode layers having non-overlapping edge portions. The cathode and anode layers are shaped or positioned such that edge portions of the two layers are offset from one another in a layered structure.
In one or more embodiments, the above described methods and structures provide for a capacitor making efficient use of space within the case, increased anodic surface area and increased capacitance for a capacitor of a given set of dimensions. Variation in the outer dimensions of one capacitor stack to another capacitor stack is reduced because each is formed within alignment elements positioned the same manner. Dimensional variations in the capacitor stack resulting from variation in the reference points from case to case or alignment apparatus to alignment apparatus are eliminated. This provides improved dimensional consistency in production and allows for reduced tolerances between the capacitor stack and the capacitor case. This allows for more efficient use of space internal to the capacitor case.
These and other embodiments, aspects, advantages, and features of the present invention will be set forth in part in the description which follows, and in part will become apparent to those skilled in the art by reference to the following description of the invention and referenced drawings or by practice of the invention. The aspects, advantages, and features of the invention are realized and attained by means of the instrumentalities, procedures, and combinations particularly pointed out in the appended claims and their equivalents.
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Barr A. Gordon
Kavanagh Richard J.
O'Phelan Michael J.
Poplett James M.
Tong Robert R.
Cardiac Pacemakers Inc.
Schwegman Lundberg Woessner & Kluth P.A.
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