Silicided undoped polysilicon for capacitor bottom plate

Details Silicided undoped polysilicon for capacitor bottom plate Silicided undoped polysilicon for capacitor bottom plate

2002-03-20

2003-09-16

Zarabian, Amir (Department: 2822)

Semiconductor device manufacturing: process

Making passive device

Planar capacitor

C438S250000, C438S253000, C438S396000

Reexamination Certificate

active

06620700

ABSTRACT:

FIELD OF THE INVENTION
The invention is generally related to the field of forming capacitors on a semiconductor device and more specifically to forming large area capacitors on high speed RF devices.
BACKGROUND OF THE INVENTION
High performance capacitors are needed for RF circuits such as ac coupling capacitors in mixers and LNAs, ADCs (analog to digital converters), DAC (digital to analog converters), and filters. High intended capacitance per square micron, low resistances, and high intended capacitance/parasitic capacitance ratio are critical. Several types of capacitors are known in the art.
FIG. 1A
shows a poly/diffusion capacitor in which the capacitor is formed using a polysilicon layer
16
separated from a doped region
12
by a gate oxide layer
14
.
FIG. 1B
shows a poly/poly capacitor in which a first doped polysilicon layer
20
is formed on a field oxide region
18
and separated from a second doped polysilicon layer
24
by an oxide layer
22
. A third capacitor type is shown in FIG.
1
C. It is a metal/metal capacitor in which two metal layers
30
,
34
are separated by a thicker oxide layer
32
. Metal/metal capacitors have lower intended capacitance per square micron and thus require a larger area.
Two newer capacitors are shown in
FIGS. 1D&1E
. These capacitors use a bottom plate comprising a layer of doped polysilicon
40
with an overlying layer of titanium-silicide
42
. The top plate
46
is titanium-nitride. The capacitor dielectric
44
is an oxide. In one variation, the bottom plate polysilicon
40
is separated from a underlying layer of doped polysilicon
48
by a thicker oxide layer
50
. However, further decreases in the parasitic capacitance to substrate and sheet resistance is desired.
SUMMARY OF THE INVENTION
The invention is a capacitor having a bottom plate that comprises undoped polysilicon which has been silicided. An advantage of the invention is providing a capacitor having reduced parasitic capacitance to the substrate and reduced sheet resistance of the bottom plate.
These and other advantages will be apparent to those of ordinary skill in the art having reference to the specification in conjunction with the drawings.


REFERENCES:
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patent: 5736776 (1998-04-01), Yamamoto et al.
patent: 6090656 (2000-07-01), Randazzo
patent: 6117755 (2000-09-01), Kun-Yu et al.
patent: 6143618 (2000-11-01), Chen et al.
patent: 6211556 (2001-04-01), Wu
patent: 6218240 (2001-04-01), Pang
patent: 6235574 (2001-05-01), Tobben et al.
patent: 6242300 (2001-06-01), Wang
patent: 2002/0016044 (2002-02-01), Dreybrodt et al.
patent: 7-240500 (1995-09-01), None

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