Interposer for semiconductor, method for manufacturing the...

Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices

Reexamination Certificate

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C361S766000, C361S768000, C361S771000, C361S782000, C361S793000, C361S795000, C257S700000, C257S701000, C257S703000, C257S724000, C174S255000, C174S262000, C029S832000, C029S846000

Reexamination Certificate

active

06507497

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an interposer for a semiconductor device, a method for producing the same and a semiconductor device including the same.
2. Description of the Related Art
Capacitors are attached, for absorbing noise, to a multilayered circuit board carrying semiconductor chips. In the prior art, chip capacitors are attached to the exterior of the multilayered circuit board for this purpose.
However, the provision of the chip capacitors in the exterior of the multilayered circuit board is problematic in that the distance between the semiconductor chips and the chip capacitors is lengthened to deteriorate the noise absorbing capacity thereof, as decoupling capacitors, and the number of steps, for mounting a plurality of chip capacitors, is increased to increase the production cost. Also, there is a problem that the total size of a device which includes the chip capacitors is large.
SUMMARY OF THE INVENTION
The present invention has been made to solve the above problems in the prior art, and an object thereof is to provide an interposer for a semiconductor device excellent in noise absorbing capacity, small in size and low in production cost, a method for producing the same and a semiconductor device using the same.
According to the present invention, there is provided an interposer adapted to be used between a mounting board and a semiconductor chip which is to be mounted on the mounting board, the interposer comprising: a heat-resistant insulator having first and second surfaces, the insulator being provided with a plurality of through-holes opened at the first and second surfaces; wiring patterns formed on the first and second surfaces of the insulator electrically connected to each other by means of a conductor provided on an inner wall of at least one of the through-holes; and a capacitor comprising first electrode formed on the insulator and having a connecting portion formed on an inner wall of at least one of the other through-holes, a dielectric layer formed on the first electrode, and a second electrode formed on the dielectric layer.
Thus, the interposer of this invention incorporates a capacitor which can be located near to and directly below the semiconductor chip. Therefore, the capacitor can very effectively act as a decoupling capacitor.
Also, a plurality of capacitors can be made at the same time when the interposer is manufactured, so that the production cost can be reduced.
Also, a wiring pattern is patterned again on the interposer, so that a fine pattern can be formed. Therefore, due to such a rewiring pattern, it is possible to reduce one of the layers of the mounting board which constitutes a multi-layered board.
The capacitor is arranged on the insulator and in a vacant area between the wiring patterns. Thus, a plurality of capacitors can be formed utilizing vacant areas between the wiring patterns.
The interposer further comprises connecting bumps on the wiring patterns and on the second electrode, the connecting bumps being used for electrically connecting the interposer to the mounting board.
The insulator is made of silicon, glass, or a heat-resistant polyimide.
The capacitor comprises the first electrode formed on at least one of the first and second surfaces of the insulator, and the dielectric layer formed on the first electrode and the second electrode formed the dielectric layer. Thus, the opposing areas of the first and second electrodes can be enlarged, so that capacity of the capacitor can be increased.
According to another aspect of the present invention, there is provided a method of manufacturing an interposer adapted to be used between a mounting board and a semiconductor chip which is to be mounted on the mounting board, the method comprising: a step for forming a plurality of through-holes in a heat-resistant insulator having first and second surfaces, so that the through-holes are opened at the first and second surfaces; a step for forming a first conductor layer on the first and second surfaces and the inner walls of the through holes of the insulator; a step for patterning the first conductor layer to form wiring patterns on the first and second surfaces of the insulator and electrically connected to each other by means of the first conductor provided on the inner wall of at least one of the through-holes and to form a first electrode on the insulator so that the first electrode is electrically connected to the first conductor formed on the inner wall of at least one of the other through-holes; a step for forming a dielectric layer to cover the first electrode and the wiring pattern; a step for patterning the dielectric layer to form the dielectric layer on the first electrode; a step for forming a second conductor layer on the insulator to cover the dielectric layer; a step for patterning the second conductor layer to form a second electrode on the dielectric layer.
Thus, a plurality of capacitors can be made at the same time when the interposer is manufactured, so that the production cost can be reduced.
According to still further aspect of the present invention, there is provided a semiconductor device comprising: a mounting board; a semiconductor chip mounted on the mounting board by means of an interposer disposed therebetween, so that predetermined portions of the semiconductor chip are electrically connected to the mounting board through the interposer. The interposer has the construction mentioned above.


REFERENCES:
patent: 4574255 (1986-03-01), Fujii et al.
patent: 5502889 (1996-04-01), Casson et al.
patent: 5854534 (1998-12-01), Belin et al.
patent: 5953213 (1999-09-01), Napierala
patent: 6052287 (2000-04-01), Palmer et al.
patent: 6137167 (2000-10-01), Ahn et al.
patent: 6333857 (2001-12-01), Kanbe et al.
patent: 6362525 (2002-03-01), Rahim

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