Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal – Magnetic field
Reexamination Certificate
2001-09-25
2003-01-07
Wilson, Allan R. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Responsive to non-electrical signal
Magnetic field
C257S422000, C365S173000
Reexamination Certificate
active
06504221
ABSTRACT:
BACKGROUND
The present invention relates to magneto-resistive devices. The present invention also relates to data storage.
Magnetic Random Access Memory (“MRAM”) is a non-volatile memory that is being considered for short-term and long-term data storage. MRAM has lower power consumption than short-term memory such as DRAM, SRAM and Flash memory. MRAM can perform read and write operations much faster (by orders of magnitude) than conventional long-term storage devices such as hard drives. In addition, MRAM is more compact and consumes less power than hard drives. MRAM is also being considered for embedded applications such as extremely fast processors and network appliances.
A typical MRAM device includes an array of memory cells, word lines extending along rows of the memory cells, and bit lines extending along columns of the memory cells. Each memory cell is located at a cross point of a word line and a bit line.
The memory cells may be based on tunneling magneto-resistive (TMR) devices such as spin dependent tunneling (SDT) junctions. A typical SDT junction includes a pinned layer, a sense layer and an insulating tunnel barrier sandwiched between the pinned and sense layers. The pinned layer has a magnetization orientation that is fixed so as not to rotate in the presence of an applied magnetic field in a range of interest. The sense layer has a magnetization that can be oriented in either of two directions: the same direction as the pinned layer magnetization or the opposite direction of the pinned layer magnetization. If the magnetizations of the pinned and sense layers are in the same direction, the orientation of the SDT junction is said to be “parallel.” If the magnetizations of the pinned and sense layers are in opposite directions, the orientation of the SDT junction is said to be “anti-parallel.” These two stable orientations, parallel and anti-parallel, may correspond to logic values of ‘0’ and ‘1.’
The magnetization orientation of the pinned layer may be fixed by an underlying antiferromagnetic (AF) pinning layer. The AF pinning layer provides a large exchange field, which holds the magnetization of the pinned layer in one direction. Underlying the AF layer are usually first and second seed layers. The first seed layer allows the second seed layer to be grown with a (111) crystal structure orientation. The second seed layer establishes a (111) crystal structure orientation for the AF pinning layer.
SUMMARY
A memory device according to the present invention includes a data ferromagnetic layer having a magnetization that can be oriented in either of two directions, a reference layer, and a spacer layer between the data and reference layers. The reference layer includes a dielectric layer, first and second conductors separated by the dielectric layer, and a ferromagnetic cladding on the first and second conductors. The memory device may be read by temporarily setting the magnetization of the reference layer to a known orientation, and determining a resistance state of the device.
Other aspects and advantages of the present invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the present invention.
REFERENCES:
patent: 6169686 (2001-01-01), Brug et al.
patent: 6211559 (2001-04-01), Zhu et al.
patent: 6404674 (2002-06-01), Anthony et al.
Bhattacharyya Manoj K.
Sharma Manish
Tran Lung T.
Hewlett--Packard Company
Wilson Allan R.
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