Signal processing apparatus

Electricity: measuring and testing – Impedance – admittance or other quantities representative of... – Lumped type parameters

Reexamination Certificate

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Reexamination Certificate

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06529015

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a signal processing apparatus for detecting a variation in a capacitance or amplifying or filtering a signal.
2. Description of the Prior Art
A signal processing circuit for detecting a variation in capacitance is known. Japanese patent application provisional publication No. 8-145717 discloses a capacitance variation detection circuit as the signal processing circuit. In this circuit, carriers are supplied to two sensor capacitors. The charges in two sensor capacitors are supplied to a C-V converter. An output signal of the C-V converter is amplified by a gain amplifier and sampled and held by two sampling hold circuits in phase with carriers, respectively. A differential amplifier outputs a difference between sampled voltages as a voltage signal corresponding to the physical amount.
If there is a considerable unbalance between sensor capacitances, the output of the C-V converter includes a considerable offset. In this circuit, the output signal of the C-V circuit is processed with voltage signals, so that the output of the gain amplifier may saturate at a high gain.
SUMMARY OF THE INVENTION
The aim of the present invention is to provide a superior signal processing apparatus.
According to the present invention, a first aspect of the present invention provides a signal processing apparatus comprising: variable capacitor means of which capacity varies with a physical amount; a C-V conversion circuit for converting variation in said capacity into a voltage signal; first and second charge holding means for holding said voltage signal at different timings as first and second charges, respectively; offset compensating charge holding means for generating and holding an offset charge for compensation of an offset in said voltage signal; charge combining and holding means for combining and holding said first and second charges and said offset charge; and outputting means for receiving the combined charge from said charge combining and holding means and outputting an output voltage signal corresponding to said physical amount in accordance with the received charge. Thus, the signal processing is performed with charge signals. Thus, if there is a considerable offset in the variable capacitors, it can be effectively removed and a high gain amplifying is provided.
According to the present invention, a second aspect of the present invention provides a signal processing apparatus comprising: variable capacitor means of which capacity varies with a physical amount; a C-V conversion circuit for converting variation in said capacity into a voltage signal; first and second charge holding means for holding said voltage signal at different timings as first and second charges, respectively; offset compensating charge holding means for generating holding an offset charge for compensation of an offset in said voltage signal; and charge combining and holding means for combining and holding said first and second charges and said offset charge as the combined charge and converting the combined charge into an output voltage signal indicative of said physical amount.
According to the present invention, a third aspect of the present invention provides a signal processing apparatus based on the first and second aspects, further comprising charge transferring means for transferring said first and second charges and said offset charge to said charge combining and holding means at the same time.
According to the present invention, a fourth aspect of the present invention provides a signal processing apparatus based on the first and second aspects, wherein said first charge holding means holds said voltage signal as said first charge corresponding to an offset voltage of said C-V conversion circuit, said second charge holding means holds said voltage signal as said second charge representing variation in said capacity, and said charge combining and holding means holds said combined charge derived by subtracting said first charge and said offset charge from said second charge. Thus, offsets developed in the variable capacitor means and the C-V converter can be removed in the output signal.
According to the present invention, a fifth aspect of the present invention provides a signal processing apparatus comprising: variable capacitor means of which capacity varies with a physical amount; a C-V conversion circuit for converting variation in said capacity into a voltage signal; first and second charge holding means for holding said voltage signal at different timings as first and second charges, respectively; charge combining and holding means for combining and holding said first and second charges; and outputting means for receiving the combined charge and outputting an output voltage signal in accordance with the received charge corresponding to said physical amount. This circuit is useful (low cost) if there is no offset in the variable capacitance.
According to the present invention, a sixth aspect of the present invention provides a signal processing apparatus comprising: variable capacitor means of which capacity varies with a physical amount; a C-V conversion circuit for converting variation in said capacity into a voltage signal; first and second charge holding means for holding said voltage signal at different timings as first and second charges, respectively; and charge combining and holding means for combining and holding said first and second charges and converting a combined charge into an output voltage signal corresponding to said physical amount.
According to the present invention, a seventh aspect of the present invention provides a signal processing apparatus based on the fifth and sixth aspects, further comprising charge transferring means for transferring said first and second charges to said converting means at the same time.
According to the present invention, an eighth aspect of the present invention provides a signal processing apparatus based on the fifth and sixth aspects, wherein said first charge holding means holds said voltage signal as said first charge corresponding to an offset voltage of said C-V conversion circuit, said second charge holding means holds said voltage signal as said second charge representing variation in said capacity, and said charge combining and holding means holds said combined charge derived by subtracting first charge from said second charge.
According to the present invention, a ninth aspect of the present invention provides a signal processing apparatus based on the first and fifth aspects, wherein each of said first and second charge holding means comprises at least a first capacitor and first switching means for charging and discharging said first capacitor, said charge combining and holding means comprises a second capacitor for holding the combined charge, second switching means for charging and discharging the combined charge, and a first operational amplifier for converting said combined charge into said voltage signal, and said outputting means includes a third capacitor for receiving and holding the combined charge from said second capacitor and a second operational amplifier for converting the received charge from said third capacitor into said output voltage signal.
According to the present invention, a tenth aspect of the present invention provides a signal processing apparatus based on the ninth aspects, wherein said second switching means switches between first and second states, in said first state, said second capacitor is connected between an output and a non-inverted input of said first operational amplifier, and in said second state, said second capacitor is connected in parallel to said third capacitor.
According to the present invention, an eleventh aspect of the present invention provides a signal processing apparatus based on the first, second, and sixth aspects, wherein each of said first and second charge holding means comprises at least a first capacitor and switching means for charging and discharging said first capacitor and said charge combining an

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