Single-crystal – oriented-crystal – and epitaxy growth processes; – Processes of growth from liquid or supercritical state – Having pulling during growth
Reexamination Certificate
2001-09-20
2003-07-29
Hiteshew, Felisa (Department: 1765)
Single-crystal, oriented-crystal, and epitaxy growth processes;
Processes of growth from liquid or supercritical state
Having pulling during growth
Reexamination Certificate
active
06599360
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a silicon wafer having a grown-in defect density lower than that of conventional epitaxial wafers, annealed wafers and wafers having an N-region for entire plane, a method for determining production conditions of the same and a method for producing the same. The present invention further relates to a method for determining production conditions of a silicon single crystal that is for stable production of silicon wafers of low grown-in defect density, which-wafers are produced by subjecting silicon wafers produced from a nitrogen-doped silicon single crystal to heat treatment, and a method for producing the same.
BACKGROUND ART
In recent years, in connection with use of finer circuit elements accompanying the use of higher integration degree of semiconductor circuits, the demand for quality of silicon single crystals produced by the CZ method, from which substrates of the circuit are produced, has become higher. In particular, there are defects generated during the crystal growth, which are called grown-in defects including FPD (Flow Pattern Defect), LSTD (Laser Scattering Tomography Defect), COP (Crystal Originated Particle) and so forth, and degrade oxide dielectric breakdown voltage characteristics, device characteristics and so forth, and reduction of them has been considered important.
Therefore, there have been developed several kinds of wafers produced form of crystals having few grown-in -defects, including epitaxial wafer consisting a usual silicon wafer on which a silicon layer is newly provided by epitaxial growth, annealed wafers which is produced by subjecting wafers to heat treatments at a high temperature in hydrogen or argon atmospheres, wafers having an N-region (a region free from dislocation clusters existing outside the QSF ring) for entire plane which are produced by improving the growth conditions of CZ—Si single crystals and so forth.
In addition, it is required to impart gettering ability to such wafers in order to eliminate contamination by impurities introduced during the device production process. To answer to this requirement, there have been also developed wafers imparted with the IG (Intrinsic Gettering) effect by using additional heat treatment, or doping impurities such as nitrogen or carbon to accelerate oxygen precipitation in bulk portions.
Among these, the wafers obtained by annealing nitrogen-doped wafers (referred to as “nitrogen-doped annealed wafers” hereinafter) are extremely useful as wafers showing reduced grown-in defects in wafer surface layer portions and high density of BMD (Bulk Micro Defect) in bulk portions. These are wafers developed by utilizing the defect agglomeration inhibition effect and the oxygen precipitation promotion effect of nitrogen doping, and since they have a smaller defect size compared with usual crystals, they show good efficiency for eliminating the defects in surface layers by annealing and they are wafers of effective gettering ability also showing a high BMD density in bulk portions.
However, if a highly precise defect evaluation apparatus such as MO-601 (produced by Mitsui Mining and Smelting Co., Ltd.) is used, it can be seen that these silicon wafers referred to with the term low defect also have defects, although their density is low. The apparatus MO-601 is a highly precise defect evaluation apparatus, which can measure even extremely fine defects having a size of about 50 nm, and also has a function enabling evaluation of defects along the depth direction for a depth of 5 &mgr;m.
According to evaluation of defects having a size 50 nm or more (LSTD) for a depth of, for example, 5 &mgr;m by using such a defect evaluation apparatus, it can be seen that there are defects in a density of about 40 number/6″ wafer (0.23 number/cm
2
) in usual epitaxial wafers and nitrogen-doped wafers undergone epitaxial growth, about 3000 number/6″ wafer (17 number/cm
2
) in annealed wafers, and about 70/6″ wafer (0.40 number/cm
2
) in wafers having an N-region for entire plane and nitrogen-doped wafers having an N-region for entire plane. Since these defects have an extremely small size, they do not cause any problem in many cases in the present device production process of the usual level. However, they are considered to inevitably cause a problem for the currently latest devices or devices expected to be produced in future.
Among these low defect wafers, the nitrogen-doped annealed wafers have the aforementioned useful effects, i.e., the grown-in defect agglomeration inhibition effect and the oxygen precipitation promotion effect, and in addition, they undergo the annealing process that eliminates defects, which is not used for epi-wafers or improved CZ wafers. Therefore, they are considered to have high potential as for reduction of grown-in defects in a considerable degree. However, the current nitrogen-doped annealed wafers shows significant fluctuation in the defect density for every production lot, and it was found that they contained defects at a level of at least about 140 number/6″ wafer (0.79 number/cm
2
) according to a measurement using the aforementioned MO-601. In order to further reduce these defects to stably produce wafers of low defect density, it is necessary to develop crystal growth conditions and annealing conditions in good balance.
Meanwhile, the nitrogen-doped CZ crystals, which are used as the raw material of nitrogen-doped annealed wafers, recently come to be actively studied, and researches about the grown-in defect agglomeration inhibition effect and the oxygen precipitation promotion effect have progressed. However, data have been scarcely obtained concerning if thermal history during the pulling of crystals affects on the formation of grown-in defects in nitrogen-doped crystals in a manner similar to that of non-nitrogen-doped crystals, or if it affects in a manner different much or less. Therefore, it is expected that, even though the annealing conditions are fixed, significant fluctuation of the detect elimination effect after the annealing would be observed, if the pulling conditions of nitrogen-doped crystals such as the thermal history during pulling of the crystals are changed.
In order to ameliorate such fluctuation, it is expected to employ an approach of eliminating more defects by annealing to obtain an extremely low defect density. However, it is not desirable to adopt such an approach because it requires costly annealing (annealing at high temperature for long time). Therefore, the defects should be controlled by the crystal pulling conditions. However, the crystal growth conditions have not been fully studied as described above, and claptrap development has been conducted so far, in which, for example, a crystal was pulled with some growth conditions, wafers are produced and annealed, and then it was confirmed if a necessary grown-in defect (mainly void defect) free region could be secured in the wafers. Thus, development cost might become high, and quality was not stabilized.
Further, since the thermal history also varies depending on the diameter of crystal, the annealing conditions may also be changed depending on it, and the crystal must be optimized for each annealing condition. However, sufficient researches have not been conducted also in this respect.
DISCLOSURE OF THE INVENTION
Therefore, the present invention was accomplished in view of the aforementioned problems, and its object is to produce a nitrogen-doped annealed wafer showing a low defect density and little fluctuation depending on production conditions by controlling grown-in defects in a nitrogen-doped crystal, which serves as a raw material of the nitrogen-doped annealed wafer.
Another object of the present invention is to provide a silicon wafer having extremely few surface defects in spite of not forming an epitaxial layer that invites increase of cost.
The present invention for achieving the aforementioned objects provides a silicon wafer, wherein an epitaxial layer is not formed on a surface, and LSTDs having a size of 50 nm or mo
Iida Makoto
Kimura Masanori
Hiteshew Felisa
Oliff & Berridg,e PLC
Shin-Etsu Handotai & Co., Ltd.
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