Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure – With means to increase current gain or operating frequency
Reexamination Certificate
1998-04-20
2003-04-29
Loke, Steven (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Bipolar transistor structure
With means to increase current gain or operating frequency
C257S565000, C257S592000
Reexamination Certificate
active
06555894
ABSTRACT:
BACKGROUND
A number of device parameters can be adjusted by optimizing local doping by appropriate patterning of a well diffusion mask. For example, the breakdown of junctions such as the base collector of a vertical transistor formed with the well as one side can be increased. A patterned well can adjust the threshold of MOS transistors formed in the well. Patterning the well can also adjust the current gain of vertical transistors having the well as base.
Fabrication of vertical bipolar transistor often begins with masking a semiconductor substrate and forming a collector well of a conductivity opposite the conductivity of the substrate. The doping of the collector layer (well) largely sets the collector-base and collector-emitter breakdowns of a vertical bipolar transistor where the base is formed in the well. The junction curvature of the base also influences the breakdown for planar structures because it increases the electric field at any applied voltage. Breakdown is increased when collector doping is reduced because reduced doping allows a wider depletion layer at a given applied voltage. Thus a higher voltage can be applied before reaching the critical field that induces breakdown. Reduced junction curvature also increases breakdown because reducing curvature reduces electric field concentration that is the source of the curvature reduced breakdown.
There are several ways to make the wells in which transistors are formed. One way diffuses the well dopant to achieve the final well depth. The dopants are typically introduced into the same surface in which the base is formed (front surface) but dopants may be introduced below that surface and diffused up until the well extends to the front surface. The well dopant is usually of opposite in conductivity to the region where the well is formed. Collector wells may be isolated from other circuit elements by any of the known isolation methods. Full dielectric isolation using a single poly dielectric isolation method or bonded wafers with trench lateral isolation are preferred methods.
It is often desirable to increase the breakdown voltage of one or more devices formed using the well as collector. A patterned collector to increase transistor breakdown is described in my U.S. Pat. No. 4,532,003. It teaches forming the collector only under the center of the base such that none of the base edge overlaps the collector. A second collector pattern is formed under the collector contact. The two portions of collector are connected by a buried layer thus providing a continuous current path from base to collector contact. The structure of
FIG. 1B
does not require a buried layer, although one can be used. It has at least a portion of the edge of the base between the emitter and the collector contact overlapping the collector. Use of patterned diffusions to reduce doping concentration is known in the formation of JTE zones as described in U.S. Pat. No. 4,927,772 to S. Arthur et. al. which is owned by Harris Corporation. There are several special considerations which should be applied when using my patterned collector method to improve breakdown that do not apply to the JTE structure which can be used to improve breakdown by patterning the JTE layer which terminates the edge of the base.
An integrated circuit design may require that several of its constituent transistors have higher breakdown voltage than the others or different current gains or threshold voltages. The doping of the well may be too high to achieve the desired parameters for those devices. One way to resolve this problem is to change the well doping. This has the unfavorable effect of increasing the collector resistance for all the lower voltage transistors formed in the same well layer. Another way is to use a second well having doping optimized for that parameter. That adds the cost of patterning and forming the second well to the cost of circuit manufacture.
SUMMARY
The invention provides both a method and apparatus for adjusting the breakdown voltage of a PN junction in a semiconductor device. The PN junction may be the junction of a diode, a transistor, or any other semiconductor device. Transistors include bipolar transistors and MOS transistors. With the invention a first region of one conductivity is formed by masked diffusion of a dopant into the front surface of a semiconductor substrate. A second region of opposite conductivity is formed into a first portion of the first region of the front surface. Parameters of the PN junction, in particular, the breakdown voltage, are controlled by adjusting the mask for the dopant such that one edge of the first region is spaced from the edge of the second region so the doping concentration of the first region at the surface intersection of the four corners of the junction between the first and the second regions is lower than the doping concentration is at some other location, (i.e., in the middle) of the first region. The breakdown is also adjusted by patterning the first region with a striped diffusion pattern. In addition, the striped diffusion pattern can be broken so that there is a gap between stripes.
The invention discloses a bipolar transistor with an adjustable breakdown junction between the collector and the base. The bipolar transistor with adjustable breakdown is formed by diffusing a collector well in the front surface of the semiconductor substrate. The well diffuses to a first depth and has a first surface perimeter defined by a first length and a first width. A base is then diffused into the front surface of the substrate and overlapping the collector well. The base has a second depth and a second surface perimeter defined by a second length and a second width. The length of the base diffused region is enclosed by the collector well diffused region and the width of the base diffused region is about equal to or greater than the width of the collector well diffused region. As such, the base mask has at least one dimension that is equal to or greater than the collector mask.
In another embodiment, the bipolar transistor is formed by using a collector well mask that contains a plurality of stripes. The adjusted breakdown bipolar transistor and normal bipolar transistors with lower breakdown voltages are simultaneously formed. The adjusted breakdown voltage bipolar transistor has a higher breakdown than the other bipolar transistors as a result of the stripes in its mask. The stripes reduce the overall average maximum doping concentration of the collector of the adjusted bipolar transistors. In one variation, the collector contact of the bipolar transistor is spaced from the collector well and also comprises a series of stripes. In another version, the collector contact is spaced and is solid and has fingers extending toward the stripes of the collector well.
The method of the invention can also be used to adjust the current gain of a bipolar transistor. The current gain is adjusted by using a masked diffusion to alter the base width. The base width is the distance between the bottom of the emitter and the top of the collector. In one embodiment, the base is formed by placing a mask consisting of a stripe over the middle of the base diffusion well. That reduces the lateral and vertical diffusion of the base in the center of the base well.
The invention can also adjust the threshold voltage of MOS transistors. The process and structure for adjusting the threshold of the MOS transistors uses a similar structure as the one used to adjust current gain in bipolar transistors. The MOS well is diffused through a mask pattern which includes a stripe which blocks introduction of well dopant. The well dopants are subsequently diffused vertically and laterally such that the well surface concentration in the laterally diffused portion in the region under the stripe is lower than it is in the unmasked area. The lower doping results in a lower threshold for a stripe than for a MOS transistor having a gate formed over the unmasked area.
The inventive devices and the method of the invention are fully compatible with the manu
Fogg and Associates LLC
Intersil America's Inc.
Loke Steven
LandOfFree
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