Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2001-11-14
2003-04-22
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S118000
Reexamination Certificate
active
06551855
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a substrate strip for use in forming semiconductor packages, and more particularly to a substrate strip including a plurality of substrate units wherein each of the substrate units is accepted.
2. Description of the Related Art
As the ability to fabricate greater numbers of transistors on a given semiconductor chip size increases, the circuits on the chip become more complex and require a greater number of external electrical connections. To accommodate the required number of external contacts, semiconductor packages have evolved from lead frame based packages, such as dual-in-line (“DIPs”) and quad-flat-pack (“QFP”) packages, to laminated substrate based packages, such as ball grid arrays (“BGA”).
FIG. 1
is a cross-sectional view of a conventional BGA package. As shown, the package comprises a laminated substrate
106
formed of, for example, a ceramic or plastic material such as epoxy-glass. Electrically conductive traces (not shown) are formed from conductive layers of the substrate
106
. Methods for forming conductive traces are known in the art. For example, photo-lithographic techniques may be used to image a desired pattern into a photo-resist material disposed on a conductive layer of the substrate
106
. The photoresist material is then “developed,” i.e., the photoresist material not exposed by the image, is removed, thereby creating a corresponding pattern of exposed conductive material on the substrate. The exposed conductive material is then removed in an etching process. Finally, the remaining photoresist material is removed, leaving the desired pattern of conductive material on the substrate. Electrical connections between the layers are formed by conductive vias, such as via
114
. Vias are formed in the substrate by known techniques, such as mechanical or laser drilling. After the via is created, it is plated with a conductive material to provide the desired electrical contact. A plurality of electrical contacts to the conductive traces of the package are provided on the lower surface of the package substrate
106
.
The essential steps for manufacturing the package substrates are described above. Thereafter, a semiconductor chip
102
is mounted to the upper surface of the package substrate
106
by a suitable chip attach material
110
, such as epoxy. Electrical connection between bond pads on the chip
102
and the conductive traces on the substrate
106
is provided by bond wires
104
. Of course, in addition to the bond wires shown, different methods of providing electrical connections from the chip to the package are also well known in the art, such as, wire bonding or “flip-chip” techniques.
At last solder balls
108
are attached to each of the contacts to allow electrical connection between the semiconductor package and external electronic components, such as printed wire boards. Solder balls
108
are conventional and typically are constructed from a lead-tin alloy and are attached to the contacts by well known methods such as re-flow soldering. Of course, other conventional electrical connectors could be substituted for the solder balls
108
, such as conductive pins attached to contacts on the lower surface of substrate
106
.
All semiconductor packages must not only provide for a number of electrical connections to be made from bond pads on a semiconductor chip to external contacts on the package, but must also provide physical protection to prevent damage to the chip during handling. To protect the chip
102
and bond wires
104
, a molded covering
112
is formed on the substrate
106
. Generally, molded covering
112
is formed on the package by a molding process.
Currently, to facilitate simultaneous assembling of a number of packages, individual substrates are provided on a substrate strip which contains multiple substrate units which are later separated or “singulated”, after the molding process. The substrate strip format helps to maximize productivity during assembly and also reduce material handling expense in other areas of the assembly process that operate on only site at a time.
One of the problems with procuring substrates in strip form is that the substrate vendor needs to provide 100% accepted units on the substrate strip so that the assembly facility does not process defected units. If the assembly facility accepts defected substrate units on each strip, then the throughput of certain assembly processes is reduced because defected units are being processed. Therefore, if the vendor fabricates substrate units in strip form and includes a certain number of defected units, all of the remaining accepted substrate units on the strip have to be thrown away. Accordingly, a method utilizes each of the accepted substrate unites produced by the substrate vendor and provides substrate strips with 100% accepted substrate units is needed.
SUMMARY OF THE INVENTION
It is a primary object of the present invention to provide a substrate strip including 100% accepted substrate units which improves the throughput of assembly process and minimizes the cost of assembly.
To achieve the above listed and other objects, the present invention provides a substrate strip characterized by including a plurality of substrate units integrally formed with a frame having at least one opening and at least one substrate unit deposed in the opening and adhered to the frame. All the substrate units on the substrate strip are accepted units for semiconductor assembly so that the assembly facility does not process “bad” units. Therefore, defected semiconductor packages are significantly reduced thereby raising the throughput of assembly process.
The present invention further provides a method for manufacturing the substrate strip. First, a substrate strip including a plurality of substrate units integrally formed with a frame is provided. There is at least one defected unit included in the substrate units. Next, the at least one defected unit is cut down from the substrate strip and at least one opening is formed in the substrate strip. Then, an accepted substrate unit cut from another weeding-out substrate strip is disposed in the opening of the substrate strip and secured to the frame by an adhesive. According to this method, the accepted substrate unit obtained from a weeding-out substrate strip is reused thereby reducing the manufacturing cost of the substrate manufacturer.
REFERENCES:
patent: 5652185 (1997-07-01), Lee
patent: 5852870 (1998-12-01), Freyman et al.
patent: 6020218 (2000-02-01), Shim et al.
patent: 6262490 (2001-07-01), Hsu et al.
patent: 6277672 (2001-08-01), Ho
patent: 6310298 (2001-10-01), Barrett et al.
Chen Kun Ching
Ding Yi Chuan
Yeh Yung I
Advanced Semiconductor Engineering Inc.
Dang Phuc T.
LandOfFree
Substrate strip and manufacturing method thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Substrate strip and manufacturing method thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Substrate strip and manufacturing method thereof will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3001138