Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2000-09-13
2002-12-10
Williams, Alexander O. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S761000, C257S758000, C257S763000, C257S764000, C257S762000, C257S774000, C257S751000, C257S700000, C257S701000, C257S741000
Reexamination Certificate
active
06492735
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device having an interconnection and a via plug, and a manufacturing method thereof
2. Description of the Related Art
In recent years, to meet the requirements for higher speed of semiconductor elements, low-resistance materials such as copper have become widely utilized as the metal for interconnections. However, because etching copper is difficult, interconnection layers are normally formed through a so-called damascene process.
In a semiconductor device wherein copper interconnection layers are laid through the damascene process, every interconnection layer is required to have a via plug so as to connect to the other layers. The metal material normally employed for the via plug is copper or tungsten. Tungsten is particularly in wide use, as it has the advantage of good adaptability to fill up any space.
FIG. 2
shows a conventional copper interconnection structure with a tungsten plug. In the structure shown in the drawing, a silicon oxide film
1
a
, a silicon oxynitride (SiON) film
11
, a silicon oxide film
1
b
, a silicon oxynitride film
12
, a silicon oxide film
1
c
, a silicon oxynitride film
13
and a silicon oxide film
1
d
are laid in this order on a semiconductor substrate that is omitted from the drawing.
Within the silicon oxide film
1
a
, there is formed a contact plug connecting with a diffusion layer of the semiconductor substrate. The contact plug is composed of a barrier metal film
6
a
made of Ti/TiN and a tungsten film
3
a
. Within the silicon oxide film
1
b
, a first copper interconnection connecting with the upper surface of the above-mentioned contact plug is formed. The first copper interconnection is composed of a tantalum-based barrier metal film
4
a
and a copper film
5
a
. Within the silicon oxide film
1
c
, there is formed an interlayer via plug connecting the upper surface of the first copper interconnection. The interlayer via plug is composed of a titanium-based barrier metal film
6
b
and a tungsten film
3
b
. Within the silicon oxide film
1
d
, a second copper interconnection connecting with the upper surface of the interlayer through hole is formed. The second copper interconnection is composed of a tantalum-based barrier metal film
4
b
and a copper film
5
b.
Now, referring to
FIGS. 10
to
12
, a manufacturing method of the conventional interconnection structure of
FIG. 2
is described below.
FIG.
10
(
a
) is a cross-sectional view illustrating the step of the manufacturing method at a stage where formation of the contact plug and the first copper interconnection has completed. The steps which bring the state of FIG.
10
(
a
) are first described. Firstly, after a silicon oxide film
1
a
is grown on a semiconductor substrate (not shown in the drawing) where elements such as a transistor are formed, a through hole is formed by dry etching, and then a barrier metal film
6
a
and a tungsten film
3
a
are formed in this order so as to fill up the inside of the through hole. Subsequent planarization is carried out by the CMP (Chemical Mechanical Polishing) and thereby formation of a tungsten plug is accomplished. Next, after growing a silicon oxynitride film
11
and a silicon oxide film
1
b
, an interconnection trench is formed within these films and, then, a tantalum-based barrier metal film
4
a
for which layers of Ta and TaN are laid in this order and a copper film
5
a
are formed in this order so as to fill up the inside of the trench. Subsequent planarization by the CMP accomplishes formation of a copper interconnection. Next, after a silicon oxynitride film
12
and a silicon oxide film
1
c
are grown, a resist film
15
patterned into a prescribed shape is formed thereon, and thus, the state of FIG.
10
(
a
) is attained.
Subsequently, dry etching with a fluorocarbon-based gas is carried out till the silicon oxynitride film
12
is exposed and a through hole
16
is formed, and then, by means of oxygen plasma ashing or the like, the resist film
15
is removed.
Next, using a different etching gas, the silicon oxynitride film
12
is etched (FIG.
10
(
c
)).
Subsequently, after a titanium film is grown over the entire surface of the silicon oxide film
1
c
by the sputtering method, a titanium nitride film is grown by the reactive sputtering method. The reactive sputtering method herein is carried out by using a Ti target and making the sputtered particles therefrom react with nitrogen before reaching the semiconductor substrate. In this manner, formation of a titanium-based barrier metal film
6
b
composed of layers of titanium/titanium nitride is accomplished.
Next, a tungsten film
3
b
is deposited (FIG.
11
(
a
)). As the material gads thereat, a gas containing WF
6
is, for example, utilized. The deposition of the tungsten film is normally carried out in two steps, the step of forming growth nuclei and the step of forming a bulk tungsten film.
First, the step of forming growth nuclei is performed. In this instance, the growth gas utilized is a mixed gas of WF
6
, SiH
4
and Ar, and the deposition temperature (substrate temperature) is set at about 450° C. When a tungsten film is grown to a prescribed thickness under these conditions, the supply of the gas is, at any rate, once stopped, and thereby the step of forming growth nuclei terminates.
Following that, with WF
6
and H
2
being supplied to the deposition chamber, a bulk tungsten film is grown to fill up the inside of the hole. This reaction is normally made under the H
2
reducing condition where the growth rate of the film is faster than that in the step of growing nuclei. In this instance, the growth gas utilized is a mixed gas of WF
6
, H
2
and Ar, and the deposition temperature (substrate temperature) is set at about 450° C. Now, with this film growth, the inside of the through hole is completely filled up with tungsten. Next, by polishing the tungsten film by the CMP, the portion of the tungsten film
3
b
lying outside of the through hole is removed so that the tungsten film
3
b
is left only in the through hole, which accomplishes formation of a tungsten plug (FIG.
11
(
b
)).
Next, after growing a silicon oxynitride film
13
and a silicon oxide film
1
d
, an interconnection trench is formed within these films (FIG.
12
(
a
)) and, then, a tantalum-based barrier metal film
4
b
for which layers of Ta and TaN are laid in this order and a copper film
5
b
are formed in this order so as to fill up the inside of the trench (FIG.
12
(
b
)). Subsequent planarization by the CMP accomplishes formation of an upper layer copper interconnection (FIG.
12
(
c
)). Formation of a semiconductor device having interconnections and a tungsten plug is thereby accomplished.
The conventional technique described above has, however, problems that, in the region between the tungsten film
3
b
and the copper film
5
a
of
FIG. 2
, the titanium-based barrier metal film
6
b
may become degenerate and besides, the section of the copper film
5
a
that is in contact with the titanium-based barrier metal film
6
b
may become corroded. The occurrence of degeneration of the barrier metal film as well as corrosion of the copper film of these sorts has not been fully recognized thus far, but the investigation conducted by the present inventors confirmed that such phenomena indeed take place. It is considered that these phenomena result from the fact that a titanium-based material and copper are liable to react with each other. When the standard steps of growing films in the prior art are employed, the titanium-based material and copper interact rapidly and excessively, which leads to the degeneration of the barrier metal film and the corrosion of the copper film. Consequently, the conventional technique described above has the following problems.
The first problem is a lowering of electromigration resistance in the region between the tungsten film
3
b
and the copper film
5
a
, since the electromigration resistance becomes low in the degenerated section of t
Williams Alexander O.
Young & Thompson
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