Plasma display panel having large offset margin for...

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

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C345S061000, C345S062000, C345S065000, C345S066000, C345S067000, C345S078000, C345S088000, C345S059000, C345S055000, C313S581000, C315S168000, C315S169100

Reexamination Certificate

active

06496163

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to plasma display panel and, more particularly, to a structure of a plasma display panel for increasing an offset margin for assemblage and a controlling method used therein.
DESCRIPTION OF THE RELATED ART
The plasma display panel has various attractive features. The plasma display panel is thin, free from flicker and large in contrast. It is easy to provide a wide display area, and the viewing angle is large. The plasma display panel is promptly responsive to an image signal, and a vivid full color image is produced in the wide display area. The plasma display panel is, by way of example, used as an image display unit of a computer system.
The plasma display panel is broken down into two categories. One of the categories is called as “alternating current plasma display panel”. The alternating current plasma display panel has electrodes covered with a dielectric layer, and alternating current is applied between the electrodes so as to generate discharge in the discharge gas. The other category is called as “direct current plasma display panel”, and the electrodes are directly exposed to discharge gas. Direct current is applied to the electrodes, and the electrode generates discharge. The dielectric layer protects the electrodes of the alternating current plasma display panel from the ion bombardment, and is durable rather than the electrodes of the direct current plasma display panel.
The alternating current plasma display panel is further broken down into two sub-categories, i.e., refresh type and memory type. The alternating current plasma display panel varies the illuminance together with the repetition of discharge during a frame. The discharge takes place at each pulse, and the repetition of discharge is proportional to the number of pulses applied to the electrode during the frame. The memory type alternating current plasma display panel can adjust the number of pulses applied to each of the electrodes to an arbitrary value. On the other hand, the refresh type alternating current plasma display panel decreases the displaying time and, accordingly, the repetition of discharge on each scanning line inversely to the displaying capacity. For this reason, the memory type alternating current plasma display panel widely varies the illuminance of an image rather than the refresh type alternating current plasma display panel, and is appropriate to a wide display area. On the other hand, the refresh type alternating current plasma display panel is appropriate to a narrow display area.
A typical example of the memory type alternating current plasma display panel has discharging space between two substrate structures, and three kinds of electrodes are formed on the inner surfaces of the two substrate structures. Two kinds of electrodes are arranged on one of the substrate structures, and are used for sustain discharge. The remaining electrodes are patterned on the other substrate structure, and are used for write-in discharge together with one of the two kinds of electrodes.
FIG. 1
illustrates a pixel of the prior art memory type alternating current plasma display panel. The prior art memory type alternating current plasma display panel largely comprises two substrate structures
1
/
2
and spacers
3
for creating discharging space
4
between the substrate structures
1
and
2
. The substrate structure
1
provides a display area, and an image is produced therein.
The substrate structure
1
includes a front transparent panel
1
a,
a scanning electrode
1
b
formed on the inner surface of the front transparent panel
1
a,
a sustain electrode
1
c
formed on the inner surface in parallel to the scanning electrode
1
b,
a dielectric layer
1
d
covering the scanning/sustain electrodes
1
b/
1
c
and a protective layer
1
e
laminated on the dielectric layer
1
d.
On the other hand, the other substrate structure
2
includes a back panel
2
a,
a data electrode
2
b
extending on the inner surface of the back panel
2
a
in perpendicular to the scanning/sustain electrodes
1
b/
1
c,
a dielectric layer
2
c
covering the data electrode
2
b
and a phosphor layer
2
d
laminated on the dielectric layer
2
c.
The discharging space
4
is filled with discharge gas such as helium, neon, xenon or gaseous mixture thereof, and the spacer
3
defines the pixel. The discharge gas radiates ultra-violet light, and the phosphor layer
2
d
converts the ultra-violet light to visible light
5
. The visible light
5
passes through the front panel
1
a,
and forms a part of an image produced in the display area. The protective layer
1
e
is formed of magnesium oxide, and prevents the dielectric layer
1
d
from bombardment during the discharge.
The prior art memory type alternating current plasma display panel produces an image as follows. The pixel shown in
FIG. 1
is required to emit the visible light
5
. Firstly, a scanning pulse signal is applied between the scanning electrode
1
b
and the data electrode
2
b,
and the pulse height is larger than the threshold of discharge. The scanning pulse signal causes the discharge gas to initiates the discharge, and positive
egative charges takes place. The phosphor layer
2
d
converts the ultra-violet light to the visible light
5
, and the visible light
5
forms a part of the image. The positive charge and the negative charge are attracted to the scanning electrode
1
b
and the data electrode
2
b,
and are accumulated on the inner surfaces of the substrate structures
1
/
2
, respectively. The accumulated wall charges are inverse in polarity to the potential levels on the scanning/data electrodes
1
b/
2
b,
and reduce the effective potential difference between the scanning electrode
1
b
and the data electrode
2
b.
As a result, even though the scanning pulse signal is still applied between the scanning electrode
1
b
and the data electrode
2
b,
the pixel can not continue the discharge.
The wall charges are obstacle to continuation of the discharge. In order to eliminate or neutralize the wall charge, sustain pulse signal is alternately applied between the scanning electrode
1
b
and the sustain electrode
1
c.
Although the sustain pulse signal is lower than the threshold of discharge, the sustain pulse signal is identical in polarity with the wall charge on the substrate structure
1
, and the wall charge causes the effective potential difference to exceed over the threshold of discharge. For this reason, the discharge is continued during the alternation of the sustain pulse signal between the scanning electrode
1
b
and the sustain electrode
1
c.
This is the memory function.
In this situation when the wall charge is eliminated or neutralized, the pixel stops the discharge. An erase pulse signal is applied to either scanning or sustain electrode
1
b/
1
c.
Then, the pixel can not continue the discharge, and the visible light is extinguished.
The pixels are arranged in rows and columns as shown in
FIG. 2
, and forms a display area
6
. Circles represent the pixels, respectively. The scanning electrodes Sc
1
, Sc
2
, . . . and Scj are paired with the sustain electrodes Su
1
, Su
2
, . . . and Suj, respectively, and the scanning/sustain electrode pairs Sc
1
/Su
1
, Sc
2
/Su
2
, . . . and Scj/Suj are associated with the rows of pixels, respectively. On the other hand, data electrodes Da
1
, Da
2
, Da
3
, Da
4
, . . . , Dak-
1
and Dak extend in perpendicular to the scanning/sustain electrode pairs Sc
1
/Su
1
to Scj/Suj, and are respectively associated with the columns of pixels. The phosphor layers
2
d
are colored in the three primary colors, i.e., red, green and blue, and a color image is produced on the display area
6
.
The pixels are controlled as shown in FIG.
3
. Each frame is divided into plural sub-fields SF
1
to SF
6
, and each sub-field SF
1
to SF
6
is further divided into a preliminary discharge period A, an erasing period B, a write-in discharge period C and a sustain discharge period D
1
/D
2
/D
3
/D
4
/D
5
/D
6
. The sustain discharge period D
1
is continued f

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