Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2000-03-09
2002-11-26
Chaudhuri, Olik (Department: 2814)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S118000, C438S119000, C438S613000, C257S779000
Reexamination Certificate
active
06486001
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a fabricating method of a semiconductor device for use with various electronic units.
2. Description of the Related Art
According to the demand of a smaller and thinner semiconductor device, a semiconductor element (chip) has been connected by use of flip-chip bonding. In the flip-chip bonding method, a semiconductor chip is mounted with a face down (with an electrode pad formed surface downward) on a wiring substrate. Protruded electrode composed of for example solder (hereinafter referred to as bumps) formed on an electrode pad of the semiconductor chip is pressed to a connecting pad of the wiring substrate and then heated. Thus, the solder is reflowed and thereby the electrode pad is connected to the connecting pad of the wiring substrate. Alternatively, solder bump may be formed on a connecting pad of a wiring substrate. The flip-chip bonding method is superior to the wire bonding method in the mount density.
In a flip-chip bonded semiconductor device, the thermal expansion coefficient of a semiconductor chip composed of silicon or the like is largely different from that of a wiring substrate (for example, a glass cloth-epoxy resin impregnated wiring substrate). The stress due to the difference of the thermal expansion coefficients between the semiconductor chip and the wiring substrate is applied to solder bumps that connect the semiconductor chip and the wiring substrate, the connected portion being deteriorated.
To prevent such a problem, after solder is reflowed, as shown in
FIG. 8
, liquid resin
22
such as epoxy resin is filled in a space (gap portion) between a semiconductor chip
20
an a wiring substrate
21
due to capillary phenomenon. Thus, a resin encapsulation layer (referred to as underfill) is formed. The resin encapsulation layer alleviates the thermal stress due to the difference of the thermal expansion coefficients between the wiring substrate and the semiconductor chip. In addition, the resin encapsulation layer reinforces and mechanically protects the flip-chip bonded portion. In
FIG. 8
, reference numeral
23
denotes solder bumps. Reference numeral
24
denotes a dispenser that dispenses drops of liquid resin.
However, in such a method of forming a resin encapsulation layer, it takes a long time to fill liquid resin. In addition, the dispersibility of a filler contained in the liquid resin deteriorates on the flow end side thereof. Thus, a flow mark will take place.
To fabricate a flip-chip bonded semiconductor device, a simultaneous connecting method is known. In the simultaneous connecting method, while-bumps are being heated and connected (solder is reflowed), the resin encapsulation layer is formed.
In the method, as shown in
FIGS. 9 and 10
, after fluid resin
25
that contains flux or a reductive material is coated on a wiring substrate
21
(FIG.
10
A), at a flip-chip bonding step, the semiconductor chip
20
is mounted. Bumps
23
are heated and melted (reflowed). In addition, the height of the bumps
23
is controlled (FIG.
10
B). Thereafter, the fluid resin
25
layer is heated and hardened. The height of the bumps
23
is controlled so as to keep the space between the semiconductor chip
20
and the wiring substrate
21
with a predetermined size.
Thereafter, when necessary, as shown in
FIG. 10C
, a cover plate
26
is placed on the upper surface (the opposite surface of the electrode pad formed surface) of the semiconductor chip
20
. The cover plate
26
is adhered to the semiconductor chip
20
with adhesive agent
27
.
However, in the simultaneous connecting method, since the fluid resin
25
is coated on the connecting pad of the wiring substrate
21
, the fluid resin
25
resides at the connection interface of the bumps
23
. Thus, a connection defect tends to take place. To prevent the connection defect due to adhesion and residue of such resin, an extra step is required along with the flip-chip bonding step. However, it is difficult to adjust each step. Thus, the steps become complicated.
In other words, when the semiconductor chip
20
is mounted, to force aside the fluid resin
25
coated on the bump
23
a
on the substrate side with the bump
23
b
on the chip side, the semiconductor chip
20
should be pressed downward. In addition, to prevent the fluid resin
25
from entering the contacted surface of the bumps
23
a
and
23
b,
while the semiconductor chip
20
is being pressed, the solder should be heated and melted.
As described above, to alleviate the stress due to the difference of the thermal expansion coefficients between the semiconductor chip
20
and the wiring substrate
21
, it is necessary to keep the bumps
23
disposed therebetween with a predetermined height. Thus, while solder is being reflowed, the height of the bumps
23
should be controlled. Consequently, it is difficult to adjust such steps.
In addition, when there are many bumps
23
, it is difficult to completely force aside the resin
25
at the connection interface of the bumps
23
a
on the substrate side and the bumps
23
b
on the chip side. Thus, a connection defect tends to take place due to the adhesion or residual of the resin
25
at the bumps connection interface.
Thus, in the simultaneous connecting method of which the flip-chip bonding step and resin filling step are simultaneously performed, it is difficult to accomplish a semiconductor device with high connection reliability that satisfies the requirements of small size and many pins.
In addition, when solder bumps are melted, they become round and thereby the connection height becomes lower. Thus, it is difficult to maintain the reliability of the semiconductor device. Further, since the bumps become round, it is difficult to decrease the pitch of the bumps.
The inventors of the present invention know that a fabricating method of a semiconductor device that prevents resin from adhering and residing between an electrode pad and bumps. In the method, a fluid thermosetting adhesive layer is formed on an electrode pad formed surface of a semiconductor chip or on a connecting pad of a wiring substrate. And the adhesive layer is forced aside by bumps.
However, in such a method, when the number of bumps becomes large, it is difficult to completely force aside the adhesive layer that resides at the bump interface with the bumps. Thus, since the adhesive agent layer resides at the bump interface, electric connections become insufficient. In other words, it is difficult to satisfy the requirements of smaller size and more pins of a semiconductor chip.
SUMMARY OF THE INVENTION
The present invention is made from the above-described point of view. An object of the present invention is to provide a method of fabricating a semiconductor device with high connection reliability of a flip-chip bonded portion with simplified steps and high yield.
A first aspect of the present invention is a fabricating method of a semiconductor device, comprising the steps of (a) forming a resin layer on a connecting terminal formed surface of a wiring substrate, the wiring substrate having a connecting terminal and a wiring layer on at least one main surface thereof, (b) adhering an inner surface of a cover member on the opposite surface of an electrode terminal formed surface of a semiconductor element, the semiconductor element having an electrode terminal on a main surface thereof, (c) mounting the semiconductor element with the cover member placed with a face down on a surface of which the resin layer of the wiring substrate is formed, contacting a peripheral portion of the inner surface of the cover member, and contacting the electrode terminal of the semiconductor element and the connecting terminal of the wiring substrate through bumps formed on at least one of the electrode terminal and the connecting terminal, and (d) heating and melting the bumps to connect the electrode terminal of the semiconductor element and the connecting terminal of the wiring substrate therewith.
As the bumps, bumps composed of low-melting met
Ohshima Yumiko
Yamaguchi Naoko
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Rao Shrinivas H.
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