D/A converter

Details D/A converter D/A converter

2001-08-03

2002-12-24

Williams, Howard L. (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Digital to analog conversion

C341S136000, C341S153000

Reexamination Certificate

active

06498575

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention is related to a D/A converter for outputting an analog signal in correspondence with a digital input signal.
2. Description of the Related Art
Very recently, since fine processing techniques of semiconductor integrated circuits are specifically improved, there is great progress in digital processing techniques for conventional analog processing systems. In digital processing systems, there are many possibilities that input/output signals of such digital processing systems are produced in analog signal forms. Therefore, digital-to-analog (D/A) converters capable of converting digital signals into analog signals are necessarily required in such digital processing systems, the important aspect of which is considerably increased.
Subsequently, a conventional D/A converter will now be explained.
FIG. 10
shows a structural diagram of an n-bit D/A converter. Reference numeral
10
indicates an n-bit digital input signal, and reference numeral
11
represents a decode circuit for outputting “k” pieces of control signals used to select a predetermined current cell circuit in response to the digital input signal
10
. Symbol “k” is equal to “2
n
−1.” Also, reference numeral
12
indicates “k” pieces of current cell selection signals which are outputted from the decode circuit
11
, and reference numeral
13
represents “k” pieces of current cell circuits which are
25
selected by the current cell selection signal
12
and also own values equal to each other. Reference numeral
14
denotes an output current which is produced by adding such output currents of current cell circuits selected by the current cell selection signal
12
among all of the current cell circuits
13
, reference numeral
15
indicates another output current which is produced by adding such output currents of current cell circuits other than the current cell circuits selected by the current cell selection signal
12
among all of the current cell circuits
13
. Also, reference numeral
16
shows a current-to-voltage converting circuit for converting the output current
14
into a voltage corresponding thereto, reference numeral
17
denotes a current-to-voltage converting circuit for converting the output current
15
into a voltage corresponding thereto, reference numeral
18
represents an analog output terminal from which the voltage converted by the current-to-voltage converting circuit
16
is outputted, and reference numeral
19
shows an analog output terminal from which the voltage converted by the current-to-voltage converting circuit
17
is outputted.
FIG. 11
is a structural diagram for showing a structure of the current cell circuit
13
. Reference numeral
20
shows a current cell selection signal, reference numeral
21
represents a constant current source for supplying a unit current “i”, reference numeral
22
indicates a current output terminal to which the current “i” is supplied in the case that the current output terminal is selected by the current cell selection signal
20
, and reference numeral
23
indicates a current output terminal to which the current “i” is supplied in such a case that the current output terminal is not selected by the current cell selection signal
20
. Also, reference numeral
24
shows a Pch transistor having a switch function and connected to a current path provided on the side of the current output terminal
22
, reference numeral
25
represents another Pch transistor having a switch function and connected to a current path provided on the side of the current output terminal
23
, and also reference numeral
26
shows an inverter for inverting the current cell selection signal
20
which is supplied to the gate of the Pch transistor
24
.
Next, a description will be made of operations of the current cell circuit of FIG.
11
. As indicated in
FIG. 11
, the current cell selection signal
20
is supplied to the gate of the Pch transistor
25
, and also is supplied via the inverter
26
to the gate of the Pch transistor
24
so as to activate the switch function of any one of the current paths of the current cell circuits, so that the output currents derived from the current output terminals
22
and
23
are controlled.
FIG. 12
shows a relationship explanatory diagram for explaining the current cell selection signal
20
(SEL), and values of currents supplied to both the current output terminal
22
and the current output terminal
23
. In such a case that the current cell selection signal
20
(SEL)=1, since the Pch transistor
24
(TP
1
) is turned ON and the Pch transistor
25
(TP
2
) is turned OFF, the unit current “i” is supplied only to the current output terminal
22
whereas the unit current “i” is not supplied to the current output terminal
23
. Contrary to the above case, in such a case that the current cell selection signal
20
(SEL)=0, since the Pch transistor
25
(TP
2
) is turned ON and the Pch transistor
24
(TP
1
) is turned OFF, the unit current “i” is supplied only to the current output terminal
23
whereas the unit current “i” is not supplied to the current output terminal
22
.
FIG. 13
is a structural diagram of the current-to-voltage converting circuits
16
and
17
. Reference numeral
40
indicates a current input terminal, reference numeral
41
shows an input current having a current value “I”, reference numeral
42
indicates a resistive element having a resistance value “R”, and reference numeral
43
indicates a voltage output terminal. Next, a description will be made of operations of the current-to-voltage converting circuits
16
and
17
. The input current
41
entered from the current input terminal
40
flows entirely via the resistive element
42
to the ground at the zero potential. At this time, such a voltage defined by I×R is produced at the voltage output terminal
43
based upon the law of Ohm.
Now, operations of the n-bit D/A converter with employment of the above-explained circuit arrangement shown in
FIG. 10
will be described. Assuming now that a total number of the above-explained current cell circuits
13
is “m” (symbol “m”=0, 1, 2, . . . , k) which are selected in response to the digital input signal
10
, the output current
14
becomes “m×i,” and the output current
15
becomes (k−m) X i. As a consequence, in the case that both the current-to-voltage converting circuit
16
and the current-to-voltage converting circuit
17
are arranged by the resistive element having the resistance value “R”, such a voltage having a value of “m×i×R” is outputted from the analog output terminal
18
, and such a voltage having a value of “(k−m)×i×R” is outputted from the analog output terminal
19
. In this case, since symbol “m” may own values from “0” to (2
n
−1), it is possible to realize such a D/A converter having (2
n
) pieces of gradation, namely n-bit resolution in response to the digital input signal.
However, the above-explained conventional D/A converter owns the below-mentioned problems. That is, in the conventional D/A converter having the above-described structure, the unit current is realized by the constant current source. As a result, a plurality of constant current sources are required whose total number is equal to the necessary gradation number. For instance, in the case of a 10-bit D/A converter,
1023
(=2
10
) pieces of such constant current sources are necessarily required. Since the respective constant current sources are made of analog elements, the occupied area of these constant current sources which occupy the silicone wafer within the semiconductor integrated circuit is large. Moreover, in such a case that the resolution is increased by 1 bit, the resultant occupied area becomes approximately two times. Since product cost of a semiconductor integrated circuit largely depends upon an occupied area of this circuit, such a circuit design must be avoided which may induce an increase of the occupied area. In such a technical field of dig

Affiliated with

Also associated with

Rating

D/A converter does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with D/A converter, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and D/A converter will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2984170