Compiler optimization through combining of memory operations

Data processing: software development – installation – and managem – Software program development tool – Translation of code

Reexamination Certificate

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Details

C717S152000

Reexamination Certificate

active

06351849

ABSTRACT:

FIELD
The present invention relates to compiler optimization and, in particular, to optimization for the combining of memory operations.
BACKGROUND
In general, computer programmers write computer code as a source program in a high-level computer programming language and compile this high level code into executable code for running on a computer. The type of computer programming languages used to write the computer code may vary from procedural code type languages to object oriented languages. Due to the need to have faster applications which require less space, different optimization techniques for source code compilation of these applications have been developed.
Absent compiler optimization, for a typical memory operation, the assembly code generated by a compiler uses a general purpose register for holding the address of the memory location being modified, as well as a general purpose register for holding the value to be assigned to the memory location for each path.
Currently, one technique of compiler optimization is the combining of memory operations (e.g., load and store operations) for those variables that are the same but are located in mutually exclusive memory operation blocks (e.g., if-else statements). For example,
FIG. 1
illustrates a portion of a source program that includes mutually exclusive memory operation blocks. In particular,
FIG. 1
is an “if-else” statement that includes memory operation block
102
and memory operation block
104
that are part of the “if” statement and “else” statement, respectively. Memory operation block
102
includes the memory operation of assigning a value of one to the variable “Z.” Similarly, memory operation block
104
includes the memory operation of assigning a value of two to the same variable “Z.”
FIG. 2
illustrates a set of pseudo assembly code instructions (i.e., an executable program) outputted from a compiler after this compilation technique of the portion of the source program illustrated in FIG.
1
. These assembly code instructions are then typically translated into executable code, as is well known in the art. In particular,
FIG. 2
is a set of pseudo assembly code instructions, which includes first instruction
202
and second instruction
204
that are generated for the memory operation in memory operation block
102
. Similarly, third instruction
206
and fourth instruction
208
are generated for the memory operation in memory operation block
104
. Additionally fifth instruction
210
is generated for both memory operation block
102
and memory operation block
104
.
Instruction
202
assigns the memory address of the variable “Z” to address register R
a
, and instruction
204
assigns a value of one to value register R
v
. Similarly, instruction
206
assigns the memory address of the same variable “Z” into the same address register R
a
. Instruction
208
assigns a value of two to the same value register R
v
. Moreover, instruction
210
stores the value in value register R
v
into the memory address in address register R
a
. This technique provides for the combining of memory operations for same memory address. Therefore, the value to be stored into the memory address located in address register R
a
is decided at execution time. In particular, if during execution, the “if” is executed, the value will be one. Conversely, if during execution, the “else” is executed, the value will be two. However, this optimization technique is limited to those memory addresses that are the same. Therefore, for these and other reasons there is a need for the present invention.
SUMMARY
In one embodiment, a method for compiling includes receiving a source program having a number of memory operation blocks that are mutually exclusive. Each of the memory operation blocks have a memory operation, such that the memory operation in each block is associated with a different memory address. Additionally, an executable program is generated based on the source program. The executable program includes an executable program section for each memory operation block of the source program such that each executable program section utilizes a same number of registers for each memory operation within each memory operation block.


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Huguet et al., “Architectural Support for Reduced Register Saving/Restoring in Single-Window Register Files,” ACM Transactions on Computer Systems, vol. 9, No. 1, Feb. 1991, pp. 66-97.

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