Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver
Reexamination Certificate
2001-05-17
2002-06-04
Tran, Toan (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Current driver
C327S333000
Reexamination Certificate
active
06400193
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to an output circuit used in the last stage of a driver circuit or an amplifier circuit of semiconductor components, and more particularly, to an output circuit having the capability of high speed and high current output operation, as well as low power consumption in a steady state. The output circuit of the present invention can be advantageously implemented as a driver in a semiconductor test system for accurately driving the input pins of the semiconductor device under test, however, the present invention can also be effectively applied to an output stage of general purpose electronic circuits.
BACKGROUND OF THE INVENTION
In testing semiconductor devices such as ICs and LSIs by a semiconductor test system such as an IC tester, a semiconductor device to be tested is provided with test signals (test patterns) formed by IC testers at its appropriate device pins at predetermined test timings. The IC tester then receives the output signals from the device under test produced in response to the test signals. The output signals are sampled by the strobe signals at predetermined timings and then compared with the expected data to determine whether the device under test performs the intended functions correctly.
The test signal waveforms applied to the device under test via driver are precisely controlled their voltage values as well as timings of rising and falling edges depending on the types and test purposes of the particular device under test. Therefore, in order to accurately transmit the test signal waveforms to the device under test, the output circuit must be able to operate at high speed and with large currents. Further, the recent semiconductor devices have input and output pins of several hundreds or more, thus, the semiconductor test system must also have test channels of several hundreds or more. As a result, each output circuit of the driver to have lower power consumption is crucial to the contribution of low power consumption in the test system as a whole.
The output circuit of the present invention is not limited to the application of the above noted semiconductor test system, and thus, can be widely used in the output stage of various electronic circuits and effectively used in, for example, output stages of amplifier circuits. However, for convenience of illustration, the present invention is described below in the case where it is applied to a semiconductor test system.
Such an output circuit of conventional technology is shown in FIG.
1
. This is a typical example of a circuit structure requiring current drive capability, such as a driver circuit or an amplifier circuit. In the example of
FIG. 1
, an output circuit
10
is comprised of an input unit consisting of transistors Q
1
and Q
2
, an output unit consisting of transistors Q
3
and Q
4
, constant current sources for flowing currents I
1
and I
2
, as well as resistors R
1
, R
2
, and R
3
. The output circuit
10
supplies, for example, test signals to a semiconductor device under test with a predetermined current value under a predetermined output impedance.
In such an application in a semiconductor test system for testing a semiconductor device which requires high speed operations, large output current, and low power consumption, it is difficult to satisfy all of such requirements by the conventional circuit structure shown in the drawing. Specific examples of such problems will be explained in the following. Here, it is assumed that the maximum current output supplied to a load, for example, an input pin of the semiconductor device under test, from the output circuit is 70 mA (milliampere) and output impedance of the output circuit is 50 &OHgr;(ohms).
Case 1
This is a case where the output circuit is designed to achieve low power consumption as a primary objective. In this case, resistance of resistors R
1
and R
2
in the last stage are set to zero, i.e., R
1
=R
2
=0 &OHgr;, currents I
3
and I
4
in the steady state of the transistors Q
3
and Q
4
are set to 10 mA, i.e., I
3
=I
4
=10 mA, and currents I
1
and I
2
at the steady state of the transistors Q
1
and Q
2
are set to 5 mA, i.e., I
1
=I
2
=5 mA. In this setting, since a transistor junction of each of the transistors Q
3
and Q
4
need to be large enough in order to operate at the maximum current output of 70 mA. Thus, the physical size of the transistors Q
3
and Q
4
must be large.
In this circuit structure, a voltage Vbe between the base and the emitter of the transistor Q
1
and a voltage Vbe between the base and the emitter of the transistor Q
3
become equal to each other, and a voltage Vbe between the base and the emitter of the transistor Q
2
and a voltage Vbe between the base and the emitter of the transistor Q
4
also become equal to each other. Further, generally in a transistor, the following relationship is known between emitter (collector) current I, a voltage Vbe between a base and an emitter, and saturation current Is (K is constant):
I=Is·exp(KVbe) (1)
The saturation current Is mentioned here is known to be a function of a physical size of a transistor junction. A transistor which is necessary to flow a large current has a large saturation current Is, resulting in a large physical size. Even when these transistors Q
3
and Q
4
in the last stage have to flow a large current, these transistors still have a current gain (amplification factor) of several tens or so, making it unnecessary for the input transistors Q
1
and Q
2
to drive a large current.
However, in order for the voltage Vbe between the base and emitter of the transistor Q
1
to be equal to the voltage Vbe between the base and emitter of the transistor Q
3
when flowing the current 5 mA, the transistor Q
1
must have a saturation current Is which is half of the transistor Q
3
under the equation (1). The transistor Q
1
, therefore, has to be physically large which can operate at 35 mA. The relationship between transistors Q
2
and Q
4
is the same as that of the transistors Q
1
and Q
3
. As a result, the transistors Q
1
and Q
2
become large transistors which can operate at 35 mA, although they only need to drive 5 mA. Since transistors having a large physical size typically have large stray capacitance and parasitic capacitance, and therefore are not suitable for high-speed operations.
Case 2
This is a case where the output circuit is designed to achieve a high speed operation as a primary objective. In this case, the resistors R
1
and R
2
are set to R
1
=R
2
=0&OHgr;, and the currents I
1
and I
2
are set to I
1
=I
2
=5 mA, and the transistors Q
3
and Q
4
are to operate at the maximum current of 70 mA like the case 1 above. In the case 2, it is assumed that the transistors Q
1
and Q
2
are optimized for flowing the current value of 5 mA. In other words, the transistors Q
1
and Q
2
are formed in the minimum required size sufficient to drive the current value of 5 mA. Thus, the physical size of the transistors Q
1
and Q
2
can be
{fraction (1/7+L )} of the physical size mentioned in the case
1 where the transistors Q
1
and Q
2
are sized to drive the current value of 35 mA. Since parasitic capacity is smaller and conductive paths are shorter in the transistors Q
1
and Q
2
, a high-speed operation is possible.
Here, the small size of the transistors Q
1
and Q
2
means that the saturation current Is also small, and thus, a voltage Vbe between the base and emitter has to be larger than that of the case 1 in order to drive the current value of 5 mA. Hence, the voltage Vbe between the base and emitter of each of the transistors Q
3
and Q
4
becomes large accordingly. As a consequence, a large current will flow through the transistors Q
3
and Q
4
even when there is no load is provided at the output, which contradicts the reduction of power consumption.
Case 3
This is a case where the output circuit is designed to achieve both the high speed operation and the lower power consumption as a primary objective. In order
Advantest Corp.
Muramatsu & Associates
Tran Toan
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