Patent
1984-08-06
1985-11-05
Larkins, William D.
357 2311, 357 55, H01L 2176, H01L 21302, H01L 2704, H01L 2978
Patent
active
045517436
ABSTRACT:
A semiconductor integrated circuit includes pouch-shaped (in sectional view) isolation regions made of dielectric material consisting of boron and phosphor doped silicate glass. A circuit component is formed in an active region surrounded by adjacent isolation regions. Each pouch-shaped (in sectional view) isolation region is made using an anisotropic etchant and an isotropic etchant successively. There is a method for manufacturing the above device with high integration density and high operating speed.
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patent: 4019248 (1977-04-01), Black
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patent: 4318751 (1982-03-01), Horng
"Glass Forming Technique", H. S. Lehman, IBM Tech. _Disclosure Bulletin, vol. 8, No. 4, Sep. 1965, pp. 477-478.
Lamont John
Larkins William D.
Tokyo Shibaura Denki Kabushiki Kaisha
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