Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2001-01-02
2002-10-01
Powell, William A. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C216S021000, C216S065000, C216S079000, C438S719000, C438S723000, C438S737000, C438S740000
Reexamination Certificate
active
06458709
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for fabricating a repair fuse box for a semiconductor device and, more particularly, to a method for fabricating a repair fuse box for a semiconductor device in which the layout of an etching stop polysilicon layer within the semiconductor repair fuse box may be varied without requiring an additional process step and thereby improve the repair yield of the semiconductor device.
2. Background of the Related Art
When a defective portion of a semiconductor device has been in fabricating a semiconductor device, the defective portion is generally repaired. Particularly during the fabrication of a semiconductor DRAM device, the defective portions are replaced using a redundancy cell to repair the device and improve the yield.
A prior art repair method will be described with reference to
FIGS. 1 and 2
which show prior art repair fuse boxes.
Referring to
FIG. 1
, a related art repair fuse box
10
is defined in a rectangular shape. Polysilicon fuses
12
(Poly2) are arranged within the repair fuse box
10
, and an etching stop polysilicon layer
14
(Poly4) is formed in a rectangular belt shape surrounding the repair fuse box
10
.
Referring to
FIG. 2
, a first insulating film
20
and the fuses
12
are formed on a semiconductor substrate (not shown). A second insulating film
22
, the etching stop polysilicon layer
14
and a third insulating film
24
are formed on upper portions of the first insulating film
20
and the fuses
12
. The third insulating film
24
is formed outside the repair fuse box
10
, and the etching stop polysilicon layer
14
is formed on insulating film
22
around the edge portions of the repair fuse box
10
.
When the prior art Poly2 or Poly1 levels are used to form the fuses
12
, the fuses
12
are susceptible to a thickness of an oxide film that remains over the fuses
12
. Thus, the fuses
12
may be broken. Accordingly, the etching stop polysilicon layer
14
is formed on a portion which will be used as the repair fuse box
10
, so that the thickness of the oxide film remaining over the fuses
12
can be controlled uniformly during the subsequent process that will open the repair fuse box.
In order to repair a semiconductor device using a redundancy cell, certain the fuses
12
within repair fuse box
10
are then cut by lasers to disconnect a predetermined portion of the device circuitry.
As shown in
FIGS. 3 and 4
, however, a polysilicon residue
16
is fused and sticks to a sidewall of the fuse box
10
when cutting the fuses
12
. In other words, if the fuses
12
are of W salicide layer, the polysilicon residue
16
of WSi
X
can remain within the fuse box. The remaining portion of the cut fuses
12
can become connected to the etching stop polysilicon layer
14
by this polysilicon residue
16
, thereby causing poor repair performance.
SUMMARY OF THE INVENTION
The claimed inventions are directed to fabricating a repair fuse box for a semiconductor device that substantially overcomes one or more of the limitations and disadvantages of the prior art.
The layout of an etching stop polysilicon layer within a semiconductor repair fuse box is varied, without requiring additional process step, to improve the repair yield of the semiconductor device.
Additional advantages and features of the invention will be set forth in part in the following description and may become apparent to those having ordinary skill in the art upon review of the description or may be learned from practicing the invention. The objects and advantages of the invention may be realized and attained as particularly pointed out in the appended claims.
We form a first insulating film on a semiconductor substrate. Fuses are formed on the first insulating film. A second insulating film is formed on the fuses and the first insulating film. An etching stop polysilicon pattern layer is formed on a portion of the second insulating film where the repair fuse box will be formed. The etching stop polysilicon pattern is larger than the intended fuse box and is positioned so as to overlap edge portions of the repair fuse box. A third insulating film is formed on the entire surface of the above structure. A photoresist pattern is formed on the third insulating film to expose a portion, which will be used as a repair fuse box, so that at least two portions where the edge portions of the repair fuse box overlap the etching stop polysilicon layer are exposed. The third insulating film is removed using the photoresist pattern as a mask to expose the etching stop polysilicon layer. The exposed etching stop polysilicon layer is etched to form an etching stop polysilicon layer pattern having two or more broken portions in a belt shape at the edge portions of the repair fuse box. A portion of the second insulating film exposed by the photoresist pattern is etched to reduce the thickness of the second insulating film above the fuses.
In the preferred embodiment of the present invention, the fuses are formed of Poly1 or Poly2 levels, and the etching stop polysilicon layer is formed of polysilicon from the Poly4 level.
It is to be understood that both the foregoing general description, the following detailed description and the figures intended to provide further explanation of the invention as claimed and not as limiting the invention to the particular embodiments illustrated and described.
REFERENCES:
patent: 5891762 (1999-04-01), Sakai et al.
patent: 5976978 (1999-11-01), Salisbury
patent: 6017824 (2000-01-01), Lee et al.
patent: 9-51038 (1997-02-01), None
Kim Eul Rak
Shin Joong Shik
Hyundai Electronics Industries Co,. Ltd.
Pillsbury & Winthrop LLP
Powell William A.
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