Fishing – trapping – and vermin destroying
Patent
1993-11-15
1994-08-30
Fourson, George
Fishing, trapping, and vermin destroying
437 90, 437176, 148DIG40, H01L 2144
Patent
active
053427955
ABSTRACT:
This is a method of forming a vertical transistor device comprising: forming an n-type first drain/source layer 42; patterning a portion of the first drain/source layer 42 to form a channel 44 and a trench; forming a p-type gate structure 46 in the trench; and forming a n-type second drain/source layer 48 over the gate structure 46 and the channel 44; contacting the gate structure 54; forming p-ohmic contact to the gate structure 56; forming n-ohmic source contact 54; and forming n-ohmic drain contact 58. Other devices and methods are also disclosed.
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Kim Tae S.
Plumton Donald L.
Yang Jau-Yuann
Yuan Han-Tzong
Burton Dana L.
Fourson George
Kesterson James C.
Mason David M.
Stoltz Richard A.
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