Video signal processing apparatus

Television – Basic receiver with additional function – Multimode

Reexamination Certificate

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Details

C348S721000

Reexamination Certificate

active

06441860

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to the field of video signal processing apparatus which regenerates and decodes video signals employing a programmable signal processor.
BACKGROUND OF THE INVENTION
The specifications of broadcasting system for television signals are becoming increasingly diverse. At present, NTSC broadcasting systems via broadcast satellite and communications satellite, high definition television broadcasting, and digital television broadcasting are already in operation, in addition to existing terrestrial television broadcasting in NTSC color format (hereafter referred to as NTSC television broadcasting).
As the specifications of broadcasting systems continue to diversify, television sets require the corresponding ability to receive television signals broadcast via a range of broadcasting systems. In addition, as information processing devices such as personal computers become increasingly popular, display performance of so-called VGA-class (Video Graphics Array) resolution is required for home-use television sets.
Conventionally, television signals from different broadcasting systems are received and processed by switching field frequency, resolution, and number of horizontal scanning lines for each system, and this has resulted in larger and more complicated circuits.
For example,
FIG. 6
shows a block diagram of a television set designed to receive both NTSC television composite video signals and MUSE television composite video signals.
NTSC television composite video signals are received as follows. A tuner selects a channel for NTSC television composite video signals. Signals are amplified by a VIF (Video Intermediate Frequency) amplifier and then detected by a detector to generate baseband NTSC TV composite video signals. Baseband NTSC TV composite video signals are input to an input terminal
72
in
FIG. 6. A
clamping circuit
82
adjusts the DC level of the baseband NTSC television composite video signals to an appropriate level, and an analog-to-digital converter
83
quantizes the resultant baseband NTSC television composite video signals and converts them to digital signals. Sampling frequency for quantization is phase-locked to the color subcarrier and has a four times (hereafter referred to as 4 fsc) higher frequency than the color subcarrier: approximately 14 MHz. Digitized baseband NTSC TV composite video signals are fed to a NTSC video signal decoder
76
N.
On the other hand, a synchronizing signal regenerator
75
for NTSC TV composite video signals regenerates a clock signal &phgr;
81
, phase-locked to the color subcarrier, from quantized and digitized baseband NTSC TV composite video signals with a resonance circuit comprising a crystal resonator
102
. The synchronizing signal regenerator
75
also detects synchronizing signal components of quantized and digitized NTSC composite video signals with the clock signal &phgr;
81
, regenerates horizontal synchronizing signals and vertical synchronizing signals, and generates the required pulse signals such as a clock signal &phgr;
82
phase-locked to input horizontal synchronizing signals and a clamp pulse. The NTSC TV composite video signal decoder
76
N decodes NTSC TV composite video signals through a luminance signal process and a chrominance signal process using a range of signals including clock signal &phgr;
81
, clock signal &phgr;
82
, and horizontal synchronizing signals.
The 2nd phase extended definition television standard (ED2) baseband composite video signal decoder
76
E regenerates horizontal high-emphasis processing signals from ED2 composite video signals, in addition to decoding by
76
N, using the clock signals &phgr;
81
, clock signals phased-locked to &phgr;
81
, and synchronizing signals. Video signals after the above processing are sampled by a clock signal &phgr;
83
synchronized with the horizontal synchronizing pulse and vertical synchronizing pulse of the output circuit for synchronizing video signals with the horizontal synchronizing pulse and vertical synchronizing pulse of the output circuit. The clock signal &phgr;
83
is generated from a resonance circuit comprising a crystal resonator
103
, and is synchronized with the horizontal synchronizing pulse and vertical synchronizing pulse of the output circuit. For ED2 composite video signals, after the abovementioned processing, a vertical high-emphasis processing signal is regenerated using the clock signal &phgr;
83
and a clock signal phase-locked to &phgr;
83
.
At this point, the luminance signal process in
76
N and the luminance signal process in
76
E can be combined to share a common circuit, as can the chrominance signal process in
76
N and the chrominance signal process in
76
E.
The method for decoding MUSE television composite video signals is as follows. A tuner selects a channel, and the VIF (video intermediate frequency) circuit amplifies the signals received. The detector detects the waveform and generates baseband MUSE television composite video signals. Baseband MUSE TV composite video signals are input to an input terminal
71
. A clamping circuit
92
adjusts the DC level of baseband MUSE television composite video signals to appropriate level, and an analog-to-digital converter
93
quantizes baseband MUSE television composite video signals and converts them to digital composite video signals. A clock signal which is phase-locked to the horizontal phase standard signal and is about 16.2 MHz is used as sampling frequency for quantization. Digitized MUSE TV composite video signals are fed to a MUSE TV composite video signal decoder
74
. The decoder
74
regenerates wide-band high definition video signals by approximately interpolating untransmitted signals of sampling points employing infield interpolation, inframe interpolation, or interframe interpolation.
A synchronizing signal regenerator
73
for MUSE television composite video signals regenerates horizontal phase standard signals, horizontal synchronizing signals, vertical phase standard signals, and vertical synchronizing signals from MUSE composite video signals. In addition, the synchronizing signal regenerator
73
regenerates a clock signal &phgr;
91
required for operating the MUSE composite video signal decoder, from a resonance circuit comprising a crystal resonator
100
, and generates a range of control signals for the input signal. Moreover, for MUSE composite video signals, video signals of horizontal scanning period are compressed to 11/12 for transmission, requiring the decoder to decompress them. For this purpose, a clock signal &phgr;
93
, phase-locked to the horizontal scanning pulse of the display apparatus, whose frequency is about 44 MHz, is generated from the resonance circuit comprising the crystal resonator
101
. At the final stage of decoding process for MUSE composite video signals, decoded video signals are sampled by the clock signal &phgr;
93
of about 44 MHz, and synchronized with the horizontal scanning pulse. The digital-to-analog converters
87
and
97
convert each of the outputs of the NTSC television composite video signal decoder
76
N, the ED2 composite video signal decoder
76
E, and the MUSE television composite video signal decoder
74
to analog signals. The switching circuit
80
selects and outputs signals. At the same time, the switching circuit
79
also selects and outputs synchronizing signals.
SUMMARY OF THE INVENTION
The present invention relates to a video signal processing apparatus for regenerating and decoding video signals employing programmable signal processors.
In general, an exclusive decoder, synchronizing regenerator, and clock generator are required for decoding input television video signals of each signal standard. This has resulted in larger circuits and also disadvantages in cost and productivity.
The object of the present invention is to provide solutions to the above disadvantages.
(1) The present invention relates to a video signal processing apparatus employing a synchronizing signal processor for separating and processing the synchronizing signal

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