Integrated circuit device having process parameter measuring...

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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C324S1540PB, C324S762010, C324S763010

Reexamination Certificate

active

06489799

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an integrated circuit device having a process parameter measuring circuit to evaluate the characteristic of elements formed in a semiconductor fabrication process, and more particularly, to an integrated circuit device having a process parameter measuring circuit used for in-process evaluation and permitting the characteristic of finished elements after assembly to be evaluated.
2. Description of the Related Art
To trial-manufacture a device element, there has been a conventional semiconductor device having a TEG (Test Element Group) portion provided separately from the internal circuits in the integrated circuit to perform functions essential to the semiconductor device and used only for measuring electrical characteristics. The TEG portion is a circuit for testing which is used only for measuring electrical characteristics. A semiconductor device provided with this TEG portion is disclosed in Japanese Patent Laid-Open Publication No. Hei 6-138189 (conventional device
1
).
FIG. 1
is a plan view of the semiconductor device disclosed in Japanese Patent Laid-Open Publication No. Hei 6-138189.
In this conventional technique, for an internal circuit
19
and a TEG portion
20
, there are provided a connection selecting circuit
30
including field effect transistors
21
to
28
and an inverter
29
, and an input terminal
31
for a selecting signal to input a control signal. An input terminal
32
to input an operation signal of the internal circuit
19
and an output terminal
33
to output the operation result are also used in common as an input terminal for a measurement signal to the TEG portion
20
and an output terminal to output a measurement result from the TEG portion
20
. More specifically, depending upon whether a selecting signal input to the input terminal
31
is at an H level or an L level, the input terminal
32
and the output terminal
33
are selectively connected to the internal circuit
19
or the TEG portion
20
. Thus, a signal can be transmitted/received to/from the internal circuit
19
or the TEG portion
20
without providing respective separate terminals for the internal circuit
19
and the TEG portion
20
. Therefore, one input terminal and one output terminal for one of the internal circuit
19
and the TEG portion
20
can be omitted. Thus, the total number of terminals can be reduced.
Meanwhile, in the process of fabricating a semiconductor integrated circuit device, a check transistor is provided on a wafer, and process parameters including, for example, the DC current amplification factor hFE and threshold voltage Vt of the check transistor and the resistance of a polysilicon film forming an electrode are measured. Then, these measurement values are used to examine whether or not desired elements are formed.
Such a conventional check transistor is generally provided independently from other circuits and external connection terminals, using an unoccupied space on the wafer.
FIG. 2
is a circuit diagram of this conventional process parameter measuring element (conventional device
2
). As shown in
FIG. 2
, a bipolar transistor
1
, an n-channel MOS (Metal Oxide Semiconductor) transistor
2
, a p-channel MOS transistor
3
, a capacitor
4
and a resistor
5
are connected with dedicated terminals E to Q, respectively, and using these terminals E to Q, the characteristic of each element is measured. These terminals E to Q are independent from the other circuits and bonding pads, and process parameters of each element can be measured using these terminals only in a wafer (pellet) state.
In recent years, there has been a demand for smaller and more densely integrated semiconductor integrated circuit devices. According to conventional device
1
, the total number of terminals can be reduced, but the TEG portion
20
only for measuring electrical characteristics must be provided on the substrate separately from the internal circuit
19
. This disadvantage impedes the size of the device from being further reduced.
According to conventional device
2
, the check transistor operates together with the internal circuit in a normal operation state. The check transistor is however formed independently from the other circuits and external connection terminals. As a result, in order to measure the process parameters, a dedicated probe (terminal) should be used in a step separate from the sorting-out step. Also, in recent years, as the diffusion technique has developed, the size of each element has been gradually reduced. There exists a technical limit to the method of measuring process parameters by contacting the probe to the check transistor.
Note that a pad may be provided to allow the probe to abut upon the check transistor. The method is however against the trend of reduced chip size and higher density integration, and a certain area on the substrate could be wasted.
Furthermore, a main reason for measuring the values of process parameters after the assembly process is the necessity of analyzing defective products. In general, the defective product analysis must be quickly performed. However, in order to know the process parameter values after assembly, the upper part of a sample must be opened for measuring. This method not only requires time for opening the sample, but also the elements could be destroyed at the time of thus opening the sample.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide an integrated circuit device having a process parameter measuring circuit which ensures measuring of process parameters in sorting-out step between mass products or the like, regardless of the chip size (element size) or regardless of whether the measurement takes place before or after the process of assembly.
According to one aspect of the present invention, an integrated circuit device having a process parameter measuring circuit comprises an integrated circuit, an element to be measured for a process parameter, external connection terminals for connecting said integrated circuit and an external circuit, interconnections for connecting terminals of said element and said external connection terminals, a control switch provided to the interconnection connected to the terminal of the element which control the on/off of the element, and a control circuit for controlling the on/off of the switch, said control circuit turning on said switch to measure a process parameter of said element using said external connection terminals and turning off said switch to disconnect said element from said external connection terminals.
According to another aspect of the invention, an integrated circuit device comprises an integrated circuit, a plurality of elements to be measured for process parameters, the element being the same type or the different type, external connection terminals for connecting said integrated circuit and an external circuit, interconnections for connecting terminals of said elements and said external connection terminals, a plurality of control switches provided to the interconnections connected to the terminals of the elements which control the on/off of the elements, and a control circuit for controlling the on/off of the switches, said control circuit turning on said switches to measure process parameters of said elements using said external connection terminals and turning off said switches to disconnect said elements from said external connection terminals.
According to the present invention, the control circuit turns on the control switch, so that the process parameter of the particular element can be measured using the external connection terminals. After the measurement, the control switches are all turned off, and then these terminals of the element can be disconnected from the external connection terminals.
According to the present invention, the external connection terminals are bonding pads in a wafer state before assembly.
Said element is for example a bipolar transistor. In this case, the transistor has its emitter connected t

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