Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Reexamination Certificate
1998-02-18
2002-08-27
Utech, Benjamin L. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
C438S691000
Reexamination Certificate
active
06440855
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a method of processing the surface of a workpiece and a method of forming a semiconductor thin layer.
In some cases, an SOI (Silicon On Insulator) wafer including two semiconductor wafers which are bonded on each other is required to be manufactured. The manufacturing process of the SOI wafer as described above will be described briefly.
[Step-
10
]
First, the surface of a first semiconductor wafer
11
which is formed of a silicon semiconductor wafer is thermally oxidized to form an oxide film
12
of 0.3 &mgr;m in film thickness on the surface of the first semiconductor wafer
11
. Further, a second semiconductor wafer
13
formed of a silicon semiconductor wafer is prepared. A surface treatment is performed on the first and second semiconductor wafers
11
and
13
with a chemical of a hydrogen peroxide water group such as NH
4
OH/H
2
O
2
/H
2
O or H
2
SO
4
/H
2
O
2
/H
2
O to terminate the surface of the first and second semiconductor wafers
11
and
13
with OH-groups and form a bonding face on each of the first and second semiconductor wafers
11
and
13
. Thereafter, when the bonding faces of the first and second semiconductor wafers
11
and
13
are brought into contact with each other, the first and second semiconductor wafers
11
and
13
are attached to each other by van der Waals. Thereafter, an anneal treatment at a temperature of 1100° C. and for 2 hours is performed to release the OH-groups, thereby obtaining strong Si—Si coupling. Accordingly, the bonding of the first and second semiconductor wafers
11
and
13
can be achieved as shown in a schematic partially cross-sectional view of FIG.
1
A.
[Step-
20
]
Subsequently, the first semiconductor wafer
11
is grounded or polished to thin the first semiconductor wafer
11
and form a semiconductor thin layer from the first semiconductor wafer
11
, whereby an SOI wafer can be obtained.
[Step-
30
]
Thereafter, for example, a transistor device is formed in the semiconductor thin layer on the basis of a well-known method if occasion demands.
When an 8-inch wafer is used as the silicon semiconductor wafer, the average thickness of the silicon semiconductor wafer is equal to 725 &mgr;m, and the in-plane thickness precision is equal to ±15 &mgr;m. In the case of a high-precision silicon semiconductor wafer, the in-plane thickness precision is equal to about ±1.5 &mgr;m, for example. A thickness precision of about ± several nm to about ±several hundreds nm is needed as the demanded thickness precision of the semiconductor thin layer although it is varied in accordance with the applied field, and thus the thickness precision is required to be higher by one order to four orders of magnitude than the thickness precision of the silicon semiconductor wafer.
Nevertheless, the grinding/polishing work with respect to the back surface of the first semiconductor wafer
11
or the grinding/polishing work with respect to the back surface of the second semiconductor wafer
13
is performed in the conventional technique, so that the thickness precision of the semiconductor thin layer after the grinding/polishing work is low, and it is equal to about ±500 nm.
[Step-
20
] will be described in detail with reference to FIG.
2
.
FIG. 2A
shows a grinding/polishing work with respect to the back surface of the second semiconductor wafer
13
. In the grinding work, the back surface of the second semiconductor wafer
13
is fixed onto a wafer stage by a vacuum suction device (not shown), and the grinding/polishing work is performed with respect to the adsorbing face of the wafer stage (in other words, the back surface of the second semiconductor wafer
13
). In this case, the grinding/polishing work is performed on the first semiconductor wafer
11
from the back surface thereof in parallel to the adsorbing face of the wafer stage to form a semiconductor thin layer
14
. A dotted line A—A of
FIG. 2A
corresponds to the finished surface of the semiconductor thin layer
14
, and a portion of the first semiconductor wafer
11
between the dotted line A—A and the oxide film
12
corresponds to the semiconductor thin layer
14
.
As is apparent from
FIG. 2A
, even if it is assumed that the dispersion of the grinding/polishing work is small to the extent that it is negligible, the dispersion having the same level as the in-plane thickness precision of the second semiconductor wafer
13
occurs in the thickness of the semiconductor thin layer
14
. The grinding work precision when a high-precision grinding machine is used is equal to about ±300 nm. Accordingly, a precision of several hundreds cannot be achieved as the thickness precision of the semiconductor thin layer
14
unless a higher-precision silicon semiconductor wafer is selected as the second semiconductor wafer
13
from the high-precision silicon semiconductor wafers.
FIG. 2B
shows the polishing work with respect to the back surface of the first semiconductor wafer
11
. In the polishing work, an abrasive cloth which is attached onto a polishing fixed table and the back surface of the first semiconductor wafer
11
are confronted to each other. The abrasive cloth and the first and second semiconductor wafers
11
and
13
are rotated while abrasive grains (not shown) are interposed between the abrasive cloth and the back surface of the first semiconductor wafer
11
, thereby polishing the back surface of the first semiconductor wafer
11
. At this time, the semiconductor wafer is held by suitably pressing the overall first semiconductor wafer
11
so that the back surface of the first semiconductor wafer
11
is brought into contact with the abrasive cloth as flatly as possible. A dotted line B—B of
FIG. 2B
corresponds to the finished surface of the semiconductor thin layer
14
, and a portion of the first semiconductor wafer
11
between the dotted line B—B and the oxide film
12
corresponds to the semiconductor thin layer
14
. As is apparent from
FIG. 2B
, the back surface of the first semiconductor wafer
11
is equi-quantitatively polished on the overall surface from the initial surface state, so that the dispersion having the same level as the in-plane thickness precision of the first semiconductor wafer
11
occurs in the semiconductor thin layer
14
.
In general, a polishing machine is more deteriorated in processing precision and processing speed than a grinding machine. Conversely, the roughness on the finished surface (unevenness state) is more excellent in the polishing machine. Accordingly, it is practically preferable that the back surface of the first semiconductor wafer
11
is ground by using the grinding machine in accordance with specifications of the semiconductor thin layer
14
so that the thickness thereof is larger than the desired thickness of the semiconductor thin layer
14
by several &mgr;m, and then the first semiconductor wafer
11
is polished by using the polisher so that the thickness thereof is equal to the desired thickness of the semiconductor thin layer.
In the cases of
FIGS. 2A and 2B
, any sufficient work precision cannot be obtained. That is, any semiconductor layer
14
having the desired thickness precision cannot be obtained.
The main cause is as follows. That is, the grinding/polishing work is performed with respect to the back surface of any one of the bonded semiconductor wafers, and thus any semiconductor thin layer
14
having a thickness precision which is higher than the original thickness precision of the first or second semiconductor wafer
11
,
13
cannot be obtained.
A partial polishing method or a partial etching method has been proposed as a countermeasure of solving the above problem.
FIG. 3
shows a polishing work of the back surface of the first semiconductor wafer
11
by the partial polishing method. In the partial polishing method, the thickness of the first semiconductor wafer
11
which remains after the polishing is measured, and the polishing work based on the measur
Miyazawa Yoshihiro
Sato Shuzo
Chen Kin-Chan
Sonnenschein Nath & Rosenthal
Sony Corporation
Utech Benjamin L.
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