Semiconductor device manufacturing: process – With measuring or testing – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2000-07-07
2002-10-01
Everhart, Caridad (Department: 2825)
Semiconductor device manufacturing: process
With measuring or testing
Packaging or treatment of packaged semiconductor
C438S016000, C438S107000
Reexamination Certificate
active
06458609
ABSTRACT:
TECHNICAL FIELD
This invention relates to a semiconductor device and method for manufacturing same. More specifically, this invention relates to a semiconductor device having a plurality of semiconductor chips mounted on one another, and a method for manufacturing such a semiconductor device.
PRIOR ART
There is a conventional semiconductor device of this kind disclosed as one example in Japanese Patent Laying-Open No. H6-112402 laid open on Apr. 22, 1994. This prior art includes two IC chips connected at their surfaces through bumps and transfer-molded by a resin. In this prior art, however, resin tends to intrude into a gap between the IC chips during transfer molding, resulting in a possibility of damaging to the IC chips.
Meanwhile, there is also a technique disclosed in Japanese Patent Laying-Open No. H6-209071 laid open on Jul. 26, 1994 wherein, prior to transfer molding, a resin is filled in a gap between two IC chips. This eliminates the above-stated problem of damaging to the IC chips.
However, positive electrical connection between the IC chip is not available by any of the prior arts.
Further, there is a necessity of accurately recognizing the positions of electrodes when mounting one IC chip on the other IC chip. It is a conventional practice to image electrodes of an IC chip on a chip-by-chip basis. That is, two cameras must be used to image the electrodes of these IC chips, thus raising a problem of mounting up of cost.
SUMMARY OF THE INVENTION
Therefore, it is a primary object of this invention to provide a semiconductor device having two IC chips that are positively in electrical connection with their surfaces placed faced to each other.
It is another object of this invention to provide a method for manufacturing a semiconductor device by which manufacturing cost can be kept low.
A semiconductor device according to the present invention comprises: a first semiconductor chip having a first surface formed with a first electrode; a second Device and Method for Manufacturing Thereof semiconductor chip having a second surface formed with a second electrode to be connected to the first electrode and facing to the first surface; a bump formed on at least one of the first electrode and the second electrode; and an anisotropic conductive member interposed between the first surface and the second surface.
According to this invention, the first semiconductor chip and the second semiconductor chip are placed with their surfaces faced to each other. The bump is formed on the first electrode or second electrode, and an anisotropic conductive member is interposed between the first semiconductor chip and the second semiconductor chip. The anisotropic conductive member exhibits electrical conductivity in a thickness direction at a portion exerted by pressure. Consequently, the depression of the bump against the anisotropic conductive member provides electrical connection only between the first electrode and the second electrode, with other portions kept in insulation. Due to this, the first semiconductor chip and the second semiconductor chip are brought into electrical connection therebetween.
In one aspect of this invention, the first semiconductor chip and the second semiconductor chip at their joining portion are packaged by a first synthetic resin excellent in moisture resistance. The first semiconductor chip, the second semiconductor chip, and the first synthetic resin are packaged by a second synthetic resin that is excellent in adhesibility. Due to this, it is possible to protect the circuit elements that are less resistive to moisture, and improve the durability for the semiconductor chips.
In another aspect of this invention, the first electrode is formed with a bump while the second electrode with a recess. The recess serves to prevent the conductive particles from escaping sideways when the anisotropic conductive member is depressed by the bump. Due to this, the first semiconductor chip and the second semiconductor chip can be electrically connected therebetween more positively without increasing an amount of the conductive particles.
A method for manufacturing a semiconductor chip according to the present invention, comprising steps of: (a) placing a first semiconductor chip formed on a first surface with a first electrode, with the first surface directed upward; (b) imaging the first surface from above to determine a position of the first electrode; (c) position a second semiconductor chip formed on a second surface with a second electrode, with the second surface directed downward; (d) imaging one of the first surface and a back surface of the second semiconductor chip to determine a position of the second electrode; and (e) mounting the second semiconductor chip on the first semiconductor chip such that the first electrode and the second electrode are connected with each other.
According to this invention, the first semiconductor upwardly directed is imaged at its surface, and then the second semiconductor chip placed face down on the first semiconductor chip is imaged. Due to this, recognition is made for both the first electrode formed on the first semiconductor chip as well as the second electrode on the second semiconductor chip, and then the first and second electrodes are connected with each other. That is, the first semiconductor chip and the second semiconductor chip can be imaged by one camera, thus reducing manufacturing cost.
In one aspect of this invention, the second semiconductor chip is imaged at its back surface, and the position of the second electrode is determined from a result of the imaging.
In a preferred embodiment of this invention, a mark formed on the back surface of the second semiconductor chip is recognized, and the position of the second electrode is determined based on this mark. Due to this, the second semiconductor chip can be mounted on the first semiconductor chip without shifting a direction of the camera.
In another aspect of the present invention, the surface of the second semiconductor chip is imaged through a mirror, and the position of the second electrode is determined based on a result of the imaging. Therefore, the second electrode can be determined in position with accuracy.
The above described objects and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
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Hikita Junichi
Miyata Osamu
Morifuji Tadahiro
Shibata Kazutaka
Yamaguchi Tsunemori
Bodner Gerald T.
Everhart Caridad
Rohm & Co., Ltd.
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