Plasma display panel

Electric lamp and discharge devices – With gas or vapor – Three or more electrode discharge device

Reexamination Certificate

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Details

C313S582000, C313S593000

Reexamination Certificate

active

06492770

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a panel structure of a surface discharge scheme AC type plasma display panel.
2. Description of the Related Art
Recent years, a plasma display panel of a surface discharge scheme AC type as an oversize and slim display for color screen has been received attention, which is becoming widely available.
FIG. 27
is a schematically front view illustrating a cell structure of a conventional surface discharge scheme AC type plasma display panel.
FIG. 28
is a sectional view taken along the V—V line of FIG.
27
.
FIG. 29
is a sectional view taken along the W—W line of FIG.
27
.
In
FIGS. 27
to
29
, on the backside of a front glass substrate
1
to serve as a display screen of the plasma display panel (referred as “PDP” hereinafter), there is sequentially provided with a plurality of row electrode pairs (X′, Y′); a dielectric layer
2
overlaying the row electrode pairs (X′, Y′); and a protective layer
3
made of MgO which overlays a backside of the dielectric layer
2
.
The row electrodes X′ and Y′ are respectively comprised of wider transparent electrodes Xa′ and Ya′ each of which is formed of a transparent conductive film made of ITO (Indium Tin Oxide) or the like, and narrower bus electrodes Xb′ and Yb′ each of which is formed of a metal film, complementary to conductivity of the transparent electrode.
The row electrodes X′ and Y′ are arranged opposing each other with a discharge gap g′ in between, and alternate in the column direction such that each row electrode pair (X′, Y′) forms a display line (row) L on a matrix display screen.
A back glass substrate
4
faces the front glass substrate
1
with a discharge space S′, filled with a discharge gas, in between. The back glass substrate
4
is provided with a plurality of column electrodes D′ arranged to extend in a direction perpendicular to the row electrode pairs X′ and Y′; band-shaped partition walls
5
each extending between the adjacent column electrodes D′ in parallel; and a phosphor layer
6
consisting of a red phosphor layer
6
(R), green phosphor layer
6
(G) and blue phosphor layer
6
(B) which respectively overlay side faces of the partition walls
5
and the column electrodes D′.
In each display line L, the partition walls
5
divides discharge space S′ at each intersection of the column electrode D′ and the row electrode pair (X′, Y′) to defines discharge cells C′ serving as unit light emitting area.
In the above surface discharge scheme AC type PDP, an image is displayed as follows:
First, through address operation, discharge (opposite discharge) is caused selectively between the row electrode pairs (X′, Y′) and the column electrodes D′ in the respective discharge cells C′, to scatter lighted cells (the discharge cell in which wall charge is formed on the dielectric layer
2
) and nonlighted cells (the discharge cell in which wall charge is not formed on the dielectric layer
2
), over the panel in accordance with the image to be displayed.
After the address operation, in all the display lines L, the discharge sustain pulse is applied alternately to the row electrode pairs (X′, Y′) in unison, and thus discharge (surface discharge) is produced in the lighted cells on every application of the discharge sustain pulse.
In this manner, the surface discharge in each lighted cell generates ultraviolet radiation, and thus the red phosphor layer
6
(R) and/or the green phosphor layer
6
(G) and/or the blue phosphor layer
6
(B) each formed in the discharge cell C′ are excited to emit light, resulting in forming the display image.
In the above structure of the conventional PDP, the disadvantage of inferior brightness on the screen has arisen because as each discharge cell C′ is decreased in size for increasing definition of the screen, the surface area of the phosphor layer
6
decreases.
Further, another disadvantage that false discharge tends to occur arises because if a pitch of the row electrode pair (X′, Y′) is decreased for responding to a demand for high definition of the screen, interference occurs between discharges of the discharge cells C′ adjoining in the column direction (in the vertical direction of FIG.
27
).
Hence, the applicant of the present invention suggests a new surface discharge scheme AC type PDP as illustrated in
FIG. 30
to FIG.
34
.
In
FIG. 30
to
FIG. 34
, the PDP is configured such that, on a backside of a front glass substrate
10
serving as the display surface, a plurality of row electrode pairs (X, Y) are arranged in parallel to extend in the row direction (the traverse direction on
FIG. 30
) of the front glass substrate
10
.
The row electrode X is composed of transparent electrodes Xa formed in a T-like shape of a transparent conductive film made of ITO or the like, and a bus electrode Xb which is formed of a metal film extending in the row direction of the front glass substrate
10
to connect to a proximal end of the narrowed portion of the transparent electrode Xa.
Likewise, row electrode Y is composed of a transparent electrode Ya which is formed in a T-like shape of a transparent conductive film made of ITO or the like, and a bus electrode Yb which is formed of a metal film extending in the row direction of the front glass substrate
10
to connect to a proximal end of the narrowed portion of the transparent electrode Ya.
The row electrodes X and Y are alternated in the column direction (in the vertical direction on
FIG. 30
) of the front glass substrate
10
. The transparent electrodes Xa and Ya arranged along the respective bus electrodes Xb and Yb, extend mutually toward a mate of the paired row electrodes such that the top sides (or the distal ends) of the wide portions of the transparent electrodes Xa and Ya mutually face on the opposite sides of a discharge gap g having a predetermined width.
Each of the bus electrodes Xb and Yb is formed in a double layer structure with a black conductive layer Xb′ or Yb′ on the display surface side and a main conductive layer Xb″ or Yb″ on the back surface side.
A dielectric layer
11
is formed further on the backside of the front glass substrate
10
to overlay the row electrode pairs (X, Y). Furthermore, on the backside of the dielectric layer
11
, an additional dielectric layer
11
A is formed in each position which opposes the adjacent bus electrodes Xb and Yb of the respective row electrode pairs (X, Y) adjacent to each other, plus which opposes an area between the adjacent bus electrodes Xb and Yb, to protrude from the backside of the dielectric layer
11
and to extend in parallel to the bus electrodes Xb, Yb.
On the backsides of the dielectric layer
11
and the additional dielectric layers
11
A, a protective layer
12
made of MgO is formed.
Next, a back glass substrate
13
is arranged in parallel to the front glass substrate
10
. On the front surface of the back glass substrate
13
facing toward the display surface, column electrodes D are disposed at regularly established intervals from one another to extend at positions opposing the transparent electrodes Xa and Ya of the respective pairs of the row electrodes (X, Y), in a direction orthogonal to the row electrode pair (X, Y) (the column direction).
A white dielectric layer
14
is further formed on the face of the back glass substrate
13
on the display surface side to overlay the column electrodes D, and in turn formed thereon with a partition wall
15
.
The partition wall
15
is formed in a pattern, in which parallel lines cross at right angles, by a vertical wall
15
a
extending in the column direction between the adjacent column electrodes D arranged in parallel to each other, and a transverse wall
15
b
extending in the row direction in a position opposing each additional dielectric layer
11
A.
The partition wall
15
formed in such

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