Stress relaxation electronic part, stress relaxation wiring...

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Reexamination Certificate

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C428S327000, C428S458000, C428S901000, C361S748000, C361S760000, C361S761000

Reexamination Certificate

active

06465082

ABSTRACT:

TECHNICAL FIELD
The present invention relates to an electronic component such as a semiconductor device, a circuit board for mounting such an electronic component, and the like.
BACKGROUND ART
Conventionally, a plastic QFP (Quad Flat Package) in which input/output lead wires are drawn out from four side faces of a package is often used as a package type semiconductor device. As large scale integration of an electronic component such as a semiconductor device advances in accordance with increase of functions and enhancement of performance of an electronic apparatus in various fields, the number of input/output terminals is increased and this increase inevitably causes also the package shape of a QFP to expand. In order to solve this problem, the design rule of a semiconductor chip is set to a very fine level, and the lead pitch is narrowed, so that requests for miniaturization and thinning of electronic apparatuses of various kinds are satisfied.
In an LSI of a scale of 400 pins or more, however, even when the pitch is narrowed, such requests cannot be sufficiently fulfilled because of, for example, a problem in mass productivity of soldering. Moreover, there is a problem which inevitably arises in the case where an electronic component such as a semiconductor device package is mounted on a circuit board. Namely, this problem is caused by a difference in coefficient of thermal expansion between the electronic component and the circuit board. It is very difficult to connect with high reliability many input/output leads of an electronic component to a large number of electrode terminals on a circuit board having a coefficient of thermal expansion which is different from that of the electronic component. Furthermore, input/output leads which are prolonged as a result of enlargement of a plastic QFP cause a problem in that the signal transmission rate is lowered.
In order to solve many such problems involved in a plastic QFP, recently, attention is given to a semiconductor device which, unlike a QFP, has no lead pin, such as a BGA (Ball Grid Array) in which spherical connection terminals are arranged in a two-dimensional array-like manner on the rear face of a semiconductor device package, or an LGA (Land Grid Array) or CSP (Chip Size Package) in which many flat electrodes are arranged in an array-like manner on the rear face of a semiconductor device package.
In such a semiconductor device, external connection electrodes of a chip carrier are arranged in a lattice-like manner on the rear face of the chip carrier. Therefore, the semiconductor device can be miniaturized, so that a larger number of electronic components and the like can be mounted in a high density. Consequently, such a semiconductor device can largely contribute also to a miniaturized electronic apparatus. Since such a semiconductor device has no lead, connections between the semiconductor device and a circuit board can be shortened and hence the signal processing rate can be improved.
However, even a BGA of the prior art having such a structure cannot solve the problems of destruction of a package and a connection failure which are caused by a difference in coefficient of thermal expansion when the package is mounted on a circuit board and then soldered thereto. Furthermore, a BGA has a problem in that it cannot withstand reliability tests such as a thermal shock test. For example, the coefficient of thermal expansion of a chip carrier which is mainly made of ceramics is largely different from that of a circuit board which consists of glass fibers and a resin. Therefore, a great stress is generated in the connection portion and the reliability of the connection is lowered.
FIG. 15
shows a connection structure in the prior art in the case where an electronic component such as a semiconductor device is to be connected to a circuit board. Electrodes
4
of an electronic component
3
in which an LSI chip
1
is mounted on a ceramic carrier
2
are connected to electrodes
6
of a circuit board
5
by means of solder
7
. In this connection structure, the coefficient of thermal expansion of the ceramic carrier
2
of the electronic component
3
is largely different from that of the circuit board
5
which is made of a synthetic resin, etc. As the dimension L of the electronic component
3
is larger, therefore, a great stress is generated in the connection portion and a danger of destroying the connection portion is increased. Consequently, materials which can be used in an electronic component or a circuit board are largely restricted.
This will be described more specifically. Generally, the material constituting the ceramic carrier
2
on which the LSI chip
1
is mounted is largely different from that constituting the circuit board
5
, and hence their coefficients of thermal expansion greatly differ from each other. Glass-epoxy resin which is often used as the circuit board
5
has a coefficient of thermal expansion of about 15×10
−6
. By contrast, the coefficient of thermal expansion of the whole of the package of the ceramic carrier
2
including the LSI chip
1
is about 2 to 5×10
−6
. When the electronic component or an MCM has a size of 30 mm square, in the case of a temperature difference of 200° C., a dimensional difference of several tens of midrometers is generated in the connection portion between the electronic component and the circuit board as compared with the case of ordinary temperature. A stress due to the difference causes the connection portion and a weak portion of wiring conductors to be destroyed.
DISCLOSURE OF INVENTION
The invention has been conducted in order to solve the problems of the prior art. It is an object of the invention to provide a stress relaxation type electronic component, a stress relaxation type circuit board, and a stress relaxation type electronic component mounted member in which destruction of a package or a connection portion due to a difference in coefficient of thermal expansion between an electronic component such as an LSI chip or a semiconductor device package and a circuit board can be prevented from occurring.
According to the invention, in an electronic component which is to be mounted on a circuit board, a stress relaxation mechanism member is disposed on a surface of the electronic component, the surface being on a side of a connection portion where the electronic component is to be connected to the circuit board. The invention has a function that, during a thermal shock test, a stress generated owing to a difference in coefficient of thermal expansion is absorbed by the stress relaxation mechanism member. Therefore, a semiconductor device itself or a portion such as a connection portion between the semiconductor device and the circuit board is prevented from being destroyed, and the reliability of the connection of the semiconductor device and an electronic apparatus can be improved.
In the invention, a solderable layer is on a surface on a side where the stress relaxation mechanism member is connected to the circuit board. It is possible to improve the reliability of the connection of the circuit board and the electronic component.
In the invention, the solderable layer consists of copper foil, or a metal which is formed by thermally decomposing an organometallic complex film. It is possible to produce at a low cost an electronic component having excellent reliability in connection.
In the invention, the stress relaxation mechanism member is formed by an electrically conductive adhesive agent. The electronic component can be produced by a relatively simple method and at a low cost.
In the invention, the stress relaxation mechanism member is formed by a solderable electrically conductive adhesive agent. It is possible to provide at a low cost an electronic component in which the solderability and the electrical conductivity can be improved, and which has excellent reliability in connection.
In the invention, the stress relaxation mechanism member is configured by an electrode which is previously formed on the electronic component.

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