Dynamic magnetic information storage or retrieval – General recording or reproducing – Specifics of the amplifier
Reexamination Certificate
1998-03-11
2002-06-25
Hudspeth, David (Department: 2753)
Dynamic magnetic information storage or retrieval
General recording or reproducing
Specifics of the amplifier
C360S046000
Reexamination Certificate
active
06411455
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a head amplifier circuit, and, in particular, to a head amplifier circuit which supplies a writing current to a head which records a digital signal on a recording medium.
2. Description of the Related Art
In a floppy disk drive, a digital signal is converted into a magnetic field through a magnetic head, and is recorded on a floppy disk. At this time, by switching transistors in accordance with the digital signal, the writing current supplied to the magnetic head alternately flows or does not flow. Thereby, the magnetic field generated in the magnetic head is controlled, and writing of information on the floppy disk is performed.
FIG. 1
shows a circuit diagram of one example of a head amplifier circuit in the related art.
The head amplifier circuit
1
in the related art includes a plurality of switching transistor Q
1
through Q
4
. Switching of the switching transistor Q
1
through Q
4
is performed in accordance with a digital signal, and switching control of a writing current supplied to the magnetic head
2
is performed. The head amplifier circuit
1
further includes an external resistor Ra, connected in series with the magnetic head
2
, for controlling the writing current supplied to the magnetic head
2
.
The switching transistor Q
1
is an NPN transistor, the emitter being grounded, the collector being connected with one end of the magnetic head
2
and connected with the collector of the transistor Q
3
, and the base being connected with a switching controlling circuit
3
. The switching transistor Q
1
performs switching in accordance with a switching control signal from the switching control circuit
3
, and grounds the end of the magnetic head
2
.
The switching transistor Q
2
is an NPN transistor, the emitter being grounded, the collector being connected with the other end of the magnetic head
2
through the external resistor Ra, and also, being connected with the collector of the transistor Q
4
, and the base being connected with the switching controlling circuit
3
. The switching transistor Q
2
performs switching in accordance with a switching control signal from the switching control circuit
3
, and grounds the other end of the magnetic head
2
.
The switching transistor Q
3
is a PNP transistor, a power source voltage Vcc being applied to the emitter, the collector being connected with one end of the magnetic head
2
and connected with the collector of the transistor Q
1
, and the base being connected with the switching controlling circuit
3
. The switching transistor Q
3
performs switching in accordance with a switching control signal from the switching control circuit
3
, and supplies the writing current to the one end of the magnetic head
2
.
The switching transistor Q
4
is a PNP transistor, the power source voltage Vcc being applied to the emitter, the collector being connected with the other end of the magnetic head
2
through the external resistor Ra and connected with the collector of the transistor Q
2
, and the base being connected with the switching controlling circuit
3
. The switching transistor Q
4
performs switching in accordance with a switching control signal from the switching control circuit
3
, and supplies the writing current to the other end of the magnetic head
2
.
The switching control circuit
3
supplies the switching control signals, in accordance with the digital signal which is to be recorded, to the transistors Q
1
through Q
4
, respectively.
FIG. 2
illustrates operations of the example of the head amplifier circuit in the related art.
FIG. 2
shows the states of the transistors Q
1
through Q
4
. ‘1’ represents the ON state, and ‘0’ represents ‘OFF’ state.
When each of the transistors Q
1
and Q
4
is turned on, and each of the transistors Q
2
and Q
3
is turned off, shown as ‘a’ in
FIG. 2
, the terminal Ta of the magnetic head
2
is grounded and the power source voltage Vcc is applied to the terminal Tb. Thereby, the writing current flows through the magnetic head
2
from the terminal Tb to the terminal Ta. At this time, the resistor Ra connected with the magnetic head
2
in series is used for controlling the writing current supplied to the magnetic head
2
.
When each of the transistors Q
2
and Q
3
is turned on, and each of the transistors Q
1
and Q
4
is turned off, shown as ‘d’ in
FIG. 4
, the terminal Tb of the magnetic head
2
is grounded and the power source voltage Vcc is applied to the terminal Ta. Thereby, the writing current flows through the magnetic head
2
from the terminal Ta to the terminal Tb. Also at this time, the resistor Ra connected in series with the magnetic head
2
is used for controlling the writing current supplied to the magnetic head
2
.
Further, by turning off any one of the transistor Q
1
and Q
2
, and turning off each of the transistors Q
3
and Q
4
, shown as ‘c’ and ‘d’ in
FIG. 2
, any one of the transistors Q
1
and Q
2
is grounded, thereby, any one of the terminals Ta and Tb of the magnetic head
2
is grounded. Further, the power source voltage Vcc is not applied to the magnetic head
2
. Thus, no writing current flows through the magnetic head
2
.
Thus, in the head amplifier circuit in the related art, the switching transistors Q
1
through Q
4
are used for performing a switching control of connection of the magnetic head
2
with the power source voltage Vcc and the ground, and the resistor Ra connected in series with the magnetic head
2
is used for controlling the writing current.
However, in the head amplifier circuit in the related art, the switching control of supply of the writing current to the magnetic head
2
is performed by the transistors Q
1
through Q
4
. In such an arrangement, there is a possibility that, at the time of switching of the transistors Q
1
through Q
4
, a transitional excessive current flows therethrough.
Further, the writing current supplied to the magnetic head
2
is supplied from the power source voltage Vcc through the transistor Q
3
or Q
4
. Accordingly, the write current depends on the power source voltage Vcc.
SUMMARY OF THE INVENTION
The present invention has been devised in consideration of the above-mentioned points. An object of the present invention is to provide a head amplifier circuit which can stably supply the writing current.
A head amplifier circuit, according to the present invention, is provided for supplying a writing current, having a direction in accordance with a recording information, to a head for recording information on a recording medium, and comprises:
reference voltage generating means for generating a reference voltage;
constant current generating means for generating a constant current based on the reference voltage generated by the reference voltage generating means; and
grounding means,
wherein, during one period of time, the constant current generating means supplies the constant current to a first end of the head and the grounding means grounds a second end of the head, and, during another period of time, the constant current generating means supplies the constant current to the second end of the head and the grounding means grounds the first end of the head.
A head amplifier circuit, according to another aspect of the present invention, is provided for supplying a writing current, having a direction in accordance with a recording information, to a head for recording information on a recording medium, and comprises:
a reference current generating circuit for generating a reference current based on a reference voltage;
two constant current generating circuits, each for generating a constant current based on the reference current generated by the reference current generating circuit;
two grounding circuits; and
switching elements,
wherein the switching elements perform switching so that, during one period of time, one of the constant current generating circuits supplies the constant current to a first end of the head and one of the grounding circuits grounds a second end of the head, and, during an
Ikeuchi Akira
Terada Yukihiro
Davidson Dan I.
Hudspeth David
Ladas & Parry
Mitsumi Electric Co. Ltd.
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