Test circuit for logic circuits

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371 151, G06F 1100

Patent

active

049611917

ABSTRACT:
A test circuit for logic circuits of the present invention is constructed with a register for storing data to be operated in the logic circuits and its operation results and interface circuit is connected to the register through an internal bus and is controlled from external terminals. The data to be operated on by the logic circuits is set in the register directly from the interface circuit for operation, and the operation result data stored in the register are outputted to the external source directly from the interface circuit. By adopting such a configuration, since the data to be operated in the logic circuits can be transferred from the interface circuit to the register, and data of the operation result stored in the register can be transferred to the interface circuit without executing a data transfer instruction, the logic circuits can be tested readily by giving the data to the logic circuits from the external and outputting its operation results to the external.

REFERENCES:
patent: 4357703 (1982-11-01), Vanbrunt
patent: 4507727 (1985-03-01), Magar
patent: 4710927 (1987-12-01), Miller
patent: 4831623 (1989-05-01), Terzian
patent: 4837765 (1989-06-01), Suzuki

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