Semiconductor device manufacturing: process – Including control responsive to sensed condition
Reexamination Certificate
2000-10-16
2002-08-13
Fahmy, Wael (Department: 2823)
Semiconductor device manufacturing: process
Including control responsive to sensed condition
C438S007000, C438S012000, C438S285000, C438S692000
Reexamination Certificate
active
06432728
ABSTRACT:
BACKGROUND OF THE INVENTION
(1) Field of the Invention
The invention relates to the fabrication of integrated circuit devices, and more particularly, to a method of optimizing pre-layer film thickness by using Chemical Mechanical Polishing (CMP) end-point detection signals.
(2) Description of the Prior Art
The continued emphasis on semiconductor device miniaturization, leading to the technological evolution of Large Scale Integration (LSI), Very Large Scale Integration (VLSI) and Ultra Large Scale Integration (ULSI), has over the years resulted in inter-linear device distances that have become increasingly short. One of the predominant technologies that is used for the creation of semiconductor devices is the technology of photolithography which uses, with and in support of other developments in the semiconductor industry, ever shallower focal depths to create images in target surfaces. As a result of this ever shallower image depth, the target surfaces must be created with increased flatness. If a large step (an abrupt change in the planar geometry of the surface) is present in the semiconductor surface, step coverage is negatively affected. This results in a gradation of the surface that is too severe and causes poor deposition of for instance an overlying layer of metal, making it difficult to achieve a reliable semiconductor device. Increased semiconductor device density is frequently implemented using multi-layered configurations, which further leads to demands of increased planarity of the surface over which additional semiconductor device features are created. One of the main techniques that have been used in the semiconductor industry to achieve optimum surface planarity is the method of Chemical Mechanical Polishing (CMP). Chemical Mechanical Polishing is a method of polishing materials, such as semiconductor substrates, to a high degree of planarity and uniformity. The process is used to planarize semiconductor slices prior to the fabrication of semiconductor circuitry thereon, and is also used to remove high elevation features created during the fabrication of the microelectronic circuitry on the substrate.
A CMP apparatus comprises a rotating polishing platen on which a polishing pad is mounted. A second rotating part, typically referred to as the wafer carrier part, holds a wafer. The wafer is frequently attached to the wafer carrier part by means of a clamp ring, the surface of the thus clamped wafer is the surface that is to be polished. The surface of the rotating wafer is brought in intimate contact with the rotating polishing pad while a slurry is distributed over the surface that is being polished. The chemical slurry, which may also include abrasive materials therein, is maintained on the polishing pad to modify the polishing characteristics of the polishing pad in order to enhance the polishing of the substrate.
The use of chemical mechanical polishing to planarize semiconductor substrates has not met with universal acceptance, particularly where the process is used to remove high elevation features created during the fabrication of microelectronic circuitry on the surface of the substrate. One primary problem which has limited the use of chemical mechanical polishing in the semiconductor industry is the limited ability to predict, much less control, the rate and uniformity at which the process will remove material from the substrate surface. As a result, CMP is a labor-intensive process because the thickness and uniformity of the substrate must be constantly monitored to prevent over-polishing or inconsistent polishing of the substrate surface.
One factor, which contributes to the unpredictability and non-uniformity of the polishing rate of the CMP process, is the non-homogeneous replenishment of slurry on the surface of the substrate and the polishing pad. The slurry is primarily used to enhance the rate at which selected materials are removed from the substrate surface. As a fixed volume of slurry in contact with the substrate reacts with the selected materials on the surface of the substrate, this fixed volume of slurry becomes less reactive and the polishing enhancing characteristics of that fixed volume of slurry is significantly reduced. One approach to overcoming this problem is to continuously provide fresh slurry onto the polishing pad.
This approach presents at least two problems. Because of the physical configuration of the polishing apparatus, introducing fresh slurry into the area of contact between the substrate and the polishing pad is difficult. Providing a fresh supply of slurry to all positions of the substrate is even more difficult. As a result, the uniformity and the overall rate of polishing are significantly affected as the slurry reacts with the substrate.
FIG. 1
shows a Prior Art CMP apparatus. A polishing pad
12
is affixed to a circular polishing table
16
which rotates in a direction indicated by arrow
20
at a rate in the order of 1 to 200 RPM. A wafer carrier
14
is used to hold wafer
10
face down against the polishing pad
12
. The wafer
10
is held in place by applying a vacuum to the backside of the wafer (not shown). The wafer carrier
14
also rotates as indicated by arrow
19
, usually in the same direction as the polishing table
16
, at a rate on the order of 1 to 200 RPM. Due to the rotation of the polishing table
16
, the wafer traverses a circular polishing path over the polishing pad
12
. A force
18
is also applied in the downward vertical direction against wafer
10
and presses the wafer
10
against the polishing pad
12
as it is being polished. The force
18
is typically in the order of 0 to 15 pounds per square inch and is applied by means of a shaft
16
that is attached to the back of wafer carrier
14
. Slurry
13
is provided to the top of the polishing pad
12
to further enhance the polishing action of polishing pad
12
.
The Prior Art method that has been highlighted in
FIG. 1
encounters a number of problems and concerns. For instance, abrasive polishing particles are lodged in and held by the polishing pad. By using the polishing pad, the fibers of the polishing pad deteriorate, causing the abrasive particle retention within the polishing pad to diminish, reducing the polishing characteristics of the polishing pad. Also, due to the pressure that is applied to the wafer, the contact between the polishing pad and the wafer is intense and does not allow for an even distribution of the polishing slurry across the surface that is being polished. Also, the abrasive particles that essentially affect the polishing action are, during the polishing process, reduced in size, further affecting the polishing characteristics of the process.
FIG. 2
a
and
2
b
give and example of the application of the process of CMP in the creation of a semiconductor device. The example that is shown in
FIGS. 2
a
and
2
b
is characterized by its simplicity and can therefore readily be extended to more complex CMP applications. For all of these applications, the operation is essentially as the example that has been shown in
FIGS. 2
a
and
2
b
. Over a semiconductor surface
10
, for instance the surface of a silicon substrate, a layer
22
of for instance silicon nitride is deposited, patterned and etch, creating openings or trenches through the layer
22
and into the underlying semiconductor surface. These trenches have been filled with an overlying layer
24
, for instance comprising silicon oxide. It is the objective to fill the trenches that have been created in layer
22
and the underlying semiconductor surface with a material. To achieve this objective, it is clear from
FIG. 2
a
that the layer
24
must be removed from above the plane that contains the surface of layer
22
. CMP is therefore applied to the surface of layer
24
, removing this layer starting from the surface of the layer
24
and proceeding until the surface of layer
22
is reached. The results of the CMP process is shown in
FIG. 2
b
, indicating that the objective of filling the trenches that have been created through layer
22
an
Tai Shuo-Yen
Wang Jiun-Fang
Yang Ming-Cheng
Yi Champion
Ackerman Stephen B.
Collins D. M.
Fahmy Wael
ProMOS Technologies Inc.
Saile George O.
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