Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2001-11-13
2002-12-10
Talbott, David L. (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S724000, C257S758000, C257S775000
Reexamination Certificate
active
06492723
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a multichip module and manufacturing method, and particularly to a multichip module and manufacturing method which transmit a signal at a high speed and prevents noises from being generated.
As the integration density of a large-scale integrated circuit (LSI) is improved and the signal transfer speed of the LSI is increased, it is necessary for a multichip module to increase the signal transfer speed by improving the wiring density.
Increased wiring density can be achieved by making wires finer. In a conventional multichip module, however, it is difficult to making wires finer because step and stage disconnection occur on the surface toward upper layers of multiple metallic layers. In addition, as wires are made finer, the wiring resistance increases. This increases attenuation of signal amplitude, thus, high-speed signal transfer becomes difficult. Thus, it is difficult to transfer a signal at a high speed solely by improving wiring density.
Moreover, a wire or a solder ball is used as a conventional way of connecting wiring to an LSI chip. However, because the impedance between the wire or solder ball and the wiring is not equal, signal waveform deteriorates.
SUMMARY OF THE INVENTION
An object of the invention is to provide a multichip module and manufacturing method which transfer a signal at a high speed without deterioration.
According to one aspect of the present invention, a multichip module is provided which includes: a substrate having an upper surface; a hole provided on the upper surface of the substrate; a chip provided in the hole, wherein the upper surface of the chip and the upper surface of the substrate form an even, or substantially even, surface; a first insulating layer formed on the upper surface of the chip and the upper surface of the substrate; and a first wiring layer formed on the first dielectric layer.
According to another aspect of the present invention, a multichip module is provided which includes: a substrate having an upper surface; a first hole and a second hole provided on the substrate; a first chip provided in the first hole, wherein an upper surface of the first chip and the upper surface of the substrate form an even, or substantially even, surface; a second chip provided in the second hole, wherein an upper surface of the second chip and the upper surface of the substrate form an even, or substantially even, surface; a first dielectric layer formed on the upper surfaces of the substrate, the first chip and the second chip; and a first wiring layer formed over the first dielectric layer.
According to another aspect of the present invention, a method for manufacturing a multichip module, which includes a substrate having a cavity provided thereon, and a chip, is provided which includes: providing the chip in the cavity so that the upper surface of the chip and the upper surface of the substrate become even, or substantially even; forming a first insulating layer on the upper surface of the chip and the upper surface of the substrate; and forming a first wiring layer on the first insulating layer.
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patent: H10-229161 (1998-08-01), None
NEC Corporation
Sughrue & Mion, PLLC
Talbott David L.
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