Methods for reducing the number of interconnects to the PIRM...

Registers – Records – Conductive

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C235S441000, C365S105000

Reexamination Certificate

active

06478231

ABSTRACT:

FIELD OF INVENTION
The invention relates to the field of digital memory circuits, and in particular to using multiplexing and modulating techniques in order to reduce the number of interconnections required between a memory array and an interface circuit.
BACKGROUND OF THE INVENTION
Many consumer devices are now constructed to generate and/or utilize digital data in increasingly large quantities. Portable digital cameras for still and/or moving pictures, for example, generate large amounts of digital data representing images. Each digital image may require up to several megabytes (MB) of data storage, and such storage must be available in the camera. To provide for this amount of data storage application, the storage memory should be relatively low in cost for sufficient capacities of around 10 MB to 1 gigabyte (GB). The storage memory should also be low in power consumption (e.g. <<1 Watt) and have relatively rugged physical characteristics to cope with the portable battery powered operating environment. For archival storage, data need only be written to the memory once. Preferably the memory should have a short access time (in the order of milliseconds) and moderate transfer rate (e.g. 20 Mb/s). Preferably, also, the storage memory should be able to be packaged in an industry standard interface module, such as a Memory Stick or Compact Flash Card.
One form of storage currently used in portable devices such as digital cameras is flash memory. This meets the desired mechanical robustness, power consumption, transfer, and access rate characteristics mentioned above. However, a major disadvantage is that Flash memory remains relatively expensive ($1.50-$2 per MB). Because of the price it is generally unreasonable to use Flash memory storage as an archive device, thus requiring data to be transferred from it to a secondary archival storage.
Magnetic “hard disk” storage can be used for archival storage, even in portable devices. Miniature hard disk drives are available for the PCMCIA type III form factor such as IBM's Microdrive, offering capacities of up to 1 GB. However, such disk drives are still relatively expensive ($0.5 per MB), at least partially because of the relatively high fixed cost of the disk controller electronics. Miniature hard drives have other disadvantages when compared to Flash memory, such as lower mechanical robustness, higher power consumption (~2 to 4 Watt), and relatively long access times (~10 ms).
Recordable optical storage discs can similarly be used, and removable optical discs offer one large advantage compared to the hard disk. The removable optical media is very inexpensive, for example of the order of $0.03 per MB for Minidisc media. However, in most other respects optical discs storage compares poorly with magnetic hard disks including relatively poor power consumption, mechanical robustness, bulk and access performance.
Another form of archival storage is described in co-pending U.S. Patent application Ser. No. 09/875,356 entitled “Write-Once Memory”, filed Jun. 5, 2001 the disclosure of which is hereby incorporated herein by reference. The memory system disclosed therein aims to provide high capacity write-once memory at low cost for archival storage. This is realized in part by providing a portable, inexpensive, rugged memory system (PIRM) that avoids silicon substrates and minimizes process complexity. The PIRM memory system includes a memory module formed of a laminated stack of integrated circuit layers constructed on plastic substrates. Each layer contains a cross-point diode memory array, and sensing of the data stored in the array is carried out from a separate integrated circuit remotely from the memory module. The probable lowest cost implementation of the PIRM memory system is one in which the controller and other reusable electronics are either embedded in the appliance or reside in an adapter that inserts into a memory card slot. The PIRM memory module would connect via a proprietary interface to the controller. A difficultly with this approach is that making the connection between the controller and the memory module may involve a large number of connections, on the order of 120 or more. Making a low cost, compact, reliable controller to accommodate that many connectors is challenging.
Those skilled in the art will appreciate these and other advantages and benefits of various embodiments of the invention upon reading the following detailed description of a preferred embodiment with reference to the below-listed drawings.
SUMMARY OF THE INVENTION
In one aspect, the invention is a memory device. The memory device comprises a plurality of memory layers, wherein each of the plurality of layers includes a memory array; a plurality of signal modulating circuits coupled to each of the memory arrays; and a line reduction circuit coupled to the each of the plurality of memory layers. Furthermore, each of the plurality of signal modulating circuits comprises a band-pass filter circuit coupled to a rectifier circuit in series. The memory device further comprises an interface and control circuit coupled to the line reduction circuit via an interface connection. Also, the memory array is a cross-point memory array. And the line reduction circuit is a multiplexing/demultiplexing circuit. Also, the line reduction circuit is implemented on a thin non-semiconductor substrate.
In a second aspect, the invention is a memory device comprising a cross-point memory array having first and second sets of transverse electrodes and an addressing circuit; a filter and rectifier circuit connected in series; and a line reduction circuit; wherein the filter and rectifier circuit spreads predetermined signals across a frequency spectrum. Furthermore, the line reduction circuit comprises multiplexer and demultiplexer circuits. The memory device includes at least one of filters and the rectifier circuits are coupled to a power supply. And filter is a band-pass filters and the rectifier circuit includes a diode. The memory device includes the first and second sets of transverse electrodes are formed with respective memory elements formed at the crossing points of the first and second set of electrodes. Also, the memory has the first connections couple each memory array electrode in the first set to a respective unique subset of the first set of address lines and the second connections couple each memory array electrode in the second set to a respective unique subset of the second set of memory array electrodes. The memory device further comprises an interface circuit which is coupled to each of the plurality of memory layer circuits.
In a third aspect, the invention is a method for reducing the number of interconnections between a memory module and a memory controller comprising the steps of: addressing a memory element in the memory array by applying a predetermined electrical signal to the first and second set of predetermined lines to enable the state of the memory element; and transmitting the addresses from the memory array to an interface and control circuit by spreading multiple memory element addresses over a predetermined frequency spectrum. The method includes the steps of spreading multiple memory element addresses is carried out using a filter and rectifier circuit connected in series and multiplexing the spread addresses and transmitting the address to said interface and control circuit via an interface.


REFERENCES:
patent: 4954989 (1990-09-01), Auberton-Herve et al.
patent: 5905670 (1999-05-01), Babson et al.
patent: 5909617 (1999-06-01), Manning et al.
patent: 5952691 (1999-09-01), Yamaguchi
patent: 6141250 (2000-10-01), Kashimura
patent: 6256767 (2001-07-01), Kuekes et al.
patent: 6346733 (2002-02-01), Lee et al.
patent: 6362039 (2002-03-01), Manning et al.
patent: 6385075 (2002-05-01), Taussig et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Methods for reducing the number of interconnects to the PIRM... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Methods for reducing the number of interconnects to the PIRM..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Methods for reducing the number of interconnects to the PIRM... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2959126

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.