Method and apparatus for testing a semiconductor device

Data processing: measuring – calibrating – or testing – Testing system – Of circuit

Reexamination Certificate

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C702S124000, C341S120000

Reexamination Certificate

active

06498998

ABSTRACT:

This patent application claims priority based on a Japanese patent application, H11-163142 filed on Jun. 9, 1999 and 2000-144022 filed on May 16, 2000, the contents of which are incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to semiconductor testing apparatus which tests an A-D converting device that converts an analog signal to a digital signal. More particularly, the present invention relates to a waveform generating unit which generates a test waveform that is to be input to the A-D converting device under test.
2. Description of the Related Art
Accompanied by the improvement of semiconductor technology, the performance of the A-D converting device has been significantly improved. For example, the A-D converting device for use with a digital TV can process a signal of 8 MHz level. The A-D converting device for use with a hard disk can process a signal of some hundred MHz. Accompanied by the performance improvement of the A-D converting device, the same degree of improvement in performance of the semiconductor testing apparatus is required.
FIG. 1
shows a block diagram of the conventional semiconductor testing apparatus
100
. The semiconductor testing apparatus
100
is comprised of a waveform generator
10
, a sampling clock generator
12
, a device contact portion
14
and a comparator
16
. An A-D converting device
90
under test is placed on the device contact portion
14
. The waveform generator
10
generates a test waveform which is to be input to the A-D converting device
90
under test, so as to be output to the device contact portion
14
. Moreover, the A-D converting device
90
under test to which the test waveform is input outputs an expectation value to the comparator
16
.
The sampling clock generator
12
outputs to the device contact portion
14
a sampling clock which specifies a sampling interval. The A-D converting device
90
under test samples the test waveform supplied via the device contact portion
14
, at the timing of the sampling clock, so that a sampled value or an output value is output to the comparator
16
. The comparator
16
compares the output value with the expectation value supplied from the waveform generator
10
, and judges whether or not the A-D converting device
90
under test operates normally.
In order to test the A-D converting device, required is that a test signal equivalent to a signal that the A-D converting device actually processes be input to the A-D converting device. Thus, the semiconductor testing apparatus needs to have a waveform generator which generates the test waveform accurately and at high speed. For example, the waveform generator generates a sinusoidal wave as the test waveform. The performance required for the waveform generator is such that the frequency characteristic be twice as much and the dynamic range be greater than 20 dB relative to the device under test. However, generating such a highly accurate test waveform of high speed is extremely difficult in practice.
SUMMARY OF THE INVENTION
Therefore, it is an object of the present invention to provide method and apparatus for testing a semiconductor device which overcome the above issues in the related art. This object is achieved by combinations described in the independent claims. The dependent claims define further advantageous and exemplary combinations of the present invention.
According to an aspect of the present invention, semiconductor testing apparatus for testing a semiconductor device having an A-D converting, comprises: a first waveform generating unit which generates a first waveform having a predetermined waveform component; a second waveform generating unit which generates a second waveform having a known waveform component; a wave form synthesizing unit which generates a composite (synthesized) waveform by synthesizing the first waveform and the second waveform; a processing unit which processes to remove an effect of the second waveform from an output value of the semiconductor device to which the composite waveform is input; and a comparator which judges whether or not the semiconductor device operates normally, based on the first waveform and the output value processed by said processing unit.
Preferably, the comparator judges whether or not the semiconductor device operates normally based on whether or not difference between the first waveform and the output value processed by the processing unit is within a predetermined range.
Moreover, the second waveform generating unit may generate the second waveform based on a sampling clock which sets a sampling interval of the A-D converting unit. Moreover, the second waveform generating unit generates the second waveform by frequency-dividing the sampling clock.
The semiconductor testing apparatus may further comprise a phase shift unit that shifts a phase of the second waveform by a predetermined amount.
Moreover, the semiconductor testing apparatus may further comprise a pulse width adjusting unit that changes a pulse width of the second waveform, where the second waveform is preferably a square or rectangular wave.
Suppose that the first waveform is a sinusoidal wave. The semiconductor testing apparatus may further comprise an amplitude control unit which sets an amplitude of the sinusoidal wave.
Moreover, the processing unit reduces the effect of the second waveform by performing a filtering process on the output value.
Moreover, the semiconductor testing apparatus may further comprise a plurality of the second waveform generating units, in which the waveform synthesizing unit generates the composite waveform by synthesizing the first waveform and a plurality of the second waveforms generated by a plurality of the second waveform generating units.
According to another aspect of the present invention a method of testing a semiconductor device having an A-D converting unit therein comprises: generating a synthesized waveform by a first waveform having a predetermined waveform component and a second waveform whose waveform component is known; inputting the synthesized waveform to the semiconductor device; removing an effect of the second waveform from an output value of the semiconductor device; and judging whether or not the semiconductor device operates normally, based on the first waveform and the output value in which the effect of the second waveform is removed.
The judging step preferably judges whether or not the semiconductor device operates normally based on whether or not difference between the first waveform and the output value in which the effect of the second waveform is removed.
According to still another aspect of the present invention, a semiconductor device having a semiconductor testing unit which tests a device portion including an A-D converting unit, comprises: a waveform synthesizing unit which synthesizes a first waveform having a predetermined waveform component and a second waveform whose waveform component is known, so as to generate a synthesis waveform; the semiconductor testing unit which tests the device portion, based on an output value of the device portion to which the synthesis waveform is input; and the device portion which is tested by the semiconductor testing unit.
The semiconductor testing unit may further comprise a first waveform generating unit which generates the first waveform. Moreover, the semiconductor testing unit may further comprise: a processing unit which processes to remove an effect of the second waveform from the output value of the device portion to which the synthesis waveform is input; and a comparator which judges whether or not the device portion operates normally, based on the first waveform and the output value processed by the processing unit.
Preferably, the second waveform is generated based on a sampling clock which sets a sampling interval of the A-D converting unit.
Preferably, the second waveform is obtained by frequency-dividing the sampling clock.
The semiconductor device may further comprise a phase shift unit which shifts a phase of the secon

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