Edge crossing circuitry for SIMD architecture

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364DIG1, 395200, G06F 1580, G06F 1562

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active

054288045

ABSTRACT:
A parallel processor includes processing units, edge crossing circuitry, data transfer circuitry, interconnecting circuitry, and control circuitry. The edge crossing circuitry can receive an item of data that includes plural bits and can bit serially provide the item of data. The data transfer circuitry connects the processing units to the edge crossing circuitry. The interconnecting circuitry interconnects the processing units and the edge crossing circuitry. The processing units can be interconnected in pairs to form an array. The interconnections could form an array-wide shift register. The edge crossing circuitry can be interconnected to transfer items of data bit serially to processing units at the edges of the array, and can include a shift register. To perform an edge crossing operation involving first and second segments of an image, the data transfer circuitry can transfer a first item of data obtained from the processing units to the edge crossing circuitry; the edge crossing circuitry can provide a bit from the first item of data to one of the edge processing units; and one of the processing units can use the bit to obtain a second item of data relating to a part of the second segment that is across an edge from a part of the first segment to which the first item relates. The edge crossing operation can extend an arbitrary distance across the edge into the first segment. The edge crossing circuitry can also perform K-bit shifting, such as for K-bit pixels.

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