Method and a device for controlling a radio transmitter

Telecommunications – Transmitter – With feedback of modulated output signal

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Details

455127, H04B 102

Patent

active

053903617

DESCRIPTION:

BRIEF SUMMARY
BACKGROUND OF THE INVENTION

The invention relates to a method and a device for controlling a radio transmitter. In the method, the radio transmitter is alternately caused to assume an ON state in which a desired outbound RF power is transmitted, and an OFF state in which no RF power is transmitted, the RF power being determined in the ON state by means of a power control signal controlling the amplification of transmitter amplifiers. The device according to the invention provides a means for practicing the methods.
The method and the device according to the invention are intended for use in the base station of the GSM mobile radio network, but it is equally applicable to radio systems of other types in which the transmitter is keyed on the basis of varying transmission requirements. The advantage to be gained from the arrangement according to the invention is greatest in systems based on time-division multiplexing, in which high requirements are set on the transmission rate.
The GSM radio system utilizes dynamic control of transmitting power both at the base station and at mobile stations. The power control word comprises four bits, which means that there are 16 power levels available. The spacing between two successive power levels is 2 dB, and so the entire power control range is 30 dB. In a so-called TX-on time slot, in which the transmission takes place, the transmitting power is adjusted in each time slot of the frame to one of the 16 different power levels in accordance with the above-mentioned power control word. A so-called TX-off time slot, in turn, is a time slot in which no transmission occurs (the RF power is zero). In this connection, EP Patent Application 414352 A2 is referred to, which describes in more detail both the GSM system and a radio transmitter belonging to it, the transmitting power of the radio transmitter being adjustable in the TX-on time slot to one of the above-mentioned 16 power levels.
At the beginning of the transmitting time slot (TX-on), the transmitter power increases with a predetermined delay as compared with the power control voltage, whereas the data stream in the transmitter is not delayed in the same proportion. Therefore, there is the risk that the first data bits are transmitted at the beginning of the transmitting time slot before a full transmitter power is achieved. Correspondingly, wrong bits may be transmitted at the end of the transmitting time slot at full transmitter power.


SUMMARY OF THE INVENTION

The object of the present invention is to provide a method and a device by means of which it can be ensured that the data period falls within the useful period of the transmitter, within which the value of the outbound RF power is constant. This is achieved by means of a method according to the invention in such a way that a data stream is delayed with respect to the power control when the transmitter is caused to assume the ON state. The device according to the invention in turn provides a means for practicing the method.
In practicing the method of the invention, the data stream is delayed with respect to the power control so that it can be ensured that the outbound data will fall entirely within the useful period of the transmitter.


BRIEF DESCRIPTION OF THE INVENTION

In the following, the invention is described in more detail with reference to the examples shown in the attached drawings, wherein:
FIG. 1 is a simplified block diagram illustrating the transmitter of a base station in the GSM system in aspects relevant to the invention; and
FIG. 2 shows a more detailed realization of a delay circuit according to the invention.


DETAILED DESCRIPTION

FIG. 1 shows a simplified block diagram illustrating the transmitter of a GSM base station in aspects relevant to the present invention. The reference numeral 1 indicates a separator and delay circuit to the inputs of which a digital data signal D is applied. In addition, a byte clock BCK and a time slot clock SLCK are coupled to the separator and delay circuit for the synchronization of the system (the byte

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