Photocopying – Projection printing and copying cameras – With developing
Reexamination Certificate
2000-03-15
2002-10-15
Mathews, Alan A. (Department: 2851)
Photocopying
Projection printing and copying cameras
With developing
C396S611000, C118S715000, C414S152000
Reexamination Certificate
active
06466300
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a substrate processing apparatus for performing processing such as resist coating and developing processing on a substrate.
2. Description of the Related Art
In processes of semiconductor device fabrication, for instance, there is a series of processes in which a substrate to be processed, for example, a semiconductor wafer, is coated with a processing solution, for example, a photoresist solution, and a circuit pattern and the like are reduced in size and a photoresist film is exposed and developed using photolithography technology. These processes are quite important for integrating semiconductor devices to a high degree.
In such processes, a semiconductor wafer which has been subjected to cleaning processing is given hydrophobic processing in an adhesion processing unit and then cooled in a cooling processing unit, and thereafter coated with a photoresist film in a resist coating unit. The semiconductor wafer on which the photoresist film is formed is subjected to pre-bake processing in a hot plate unit, and thereafter cooled in a cooling processing unit and then exposed in a predetermined pattern in an exposure apparatus. Subsequently, the semiconductor wafer after exposure is subjected to postexposure bake processing and thereafter cooled in a cooling processing unit, and the exposed pattern is developed by applying a developing solution in a developing unit. Finally, post-bake processing is performed in a hot plate unit to enhance thermal reforming for polymerization and the fixedness between the semiconductor wafer and its pattern.
Such a series of processes except for exposure processing is performed by means of a resist coating and developing system in which the aforesaid processing units are integrally combined. As one type of such resist coating and developing systems, proposed (Japan Patent Laid-open No. Hei 4-85812) is one system in which the aforesaid plurality of processing units are disposed to be tiered in the vertical direction around a transfer path extended in the vertical direction so that a semiconductor wafer is carried into and out of each processing unit by means of a carrying mechanism which vertically moves in the transfer path. In such a processing system, it is possible to reduce a transfer path of a substrate in length when the substrate is carried between a plurality of processing mechanisms and to miniaturize apparatus, so that the substrate can be carried in a short period of time and apparatus efficiency can be enhanced.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a substrate processing apparatus suitable for processing of a large-sized substrate with a small apparatus footprint and high throughput.
However, in recent years, upsizing of semiconductor wafers has progressed into an era of 300 mm-wafers. When the above system is used to cope with such large-sized semiconductor wafers, the footprint of apparatus thereof necessarily becomes large. Moreover, the throughput is required to be improved further.
To achieve the above object, the main aspect of the present invention is a substrate processing apparatus for performing processing having a plurality of processes for a substrate which comprises: a plurality of processing mechanisms each for performing predetermined processing for the substrate in correspondence with the plurality of processes; and a transfer section for transferring the substrate, the transfer section including a plurality of transfer mechanisms for carrying the substrate into or out of the plurality of processing mechanisms and a buffer mechanism provided at a position to which each of the plurality of transfer mechanisms is accessible and having a standby section for allowing the substrate to stand by thereon temporarily, and the plurality of processing mechanisms being provided around the transfer section.
As described above, the plurality of processing mechanisms are disposed around the transfer section including the plurality of transfer mechanisms, whereby many processing mechanisms can be arranged around the transfer section, so that the footprint-per-processing ability can be made smaller than in the case of using an apparatus in which a plurality of processing mechanisms are disposed around one transfer mechanism. Moreover, the buffer mechanism is disposed at a position to which each of the plurality of transfer mechanisms is accessible, whereby a period of time of restraint of the transfer mechanism can be reduced, thus preventing the transfer mechanism from standing by while placing the substrate thereon, resulting in high throughput. Furthermore, since it is also possible to prevent the substrate from being left standing in the processing mechanism after the expiration of a predetermined period of time, a bad influence exerted on the substrate can be avoided.
These objects and still other objects and advantages of the present invention will become apparent upon reading the following specification when taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 5844662 (1998-12-01), Akimoto et al.
patent: 5937223 (1999-08-01), Akimoto et al.
patent: 5963753 (1999-10-01), Ohtani et al.
patent: 6008978 (1999-12-01), Tateyama
patent: 11-233421 (1999-08-01), None
Kim Peter B.
Mathews Alan A.
Rader & Fishman & Grauer, PLLC
Tokyo Electron Limited
LandOfFree
Substrate processing apparatus does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Substrate processing apparatus, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Substrate processing apparatus will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2956051