Computer graphics processing and selective visual display system – Computer graphics processing – Graphic manipulation
Reexamination Certificate
1998-07-24
2002-06-18
Luu, Matthew (Department: 2672)
Computer graphics processing and selective visual display system
Computer graphics processing
Graphic manipulation
C345S547000, C345S549000, C345S657000, C348S599000, C348S631000, C348S663000
Reexamination Certificate
active
06407746
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an image processing method for separating an input image signal into a luminance signal and a color signal, converting them to corresponding digital signals, time-division sampling luminance data and color data respectively represented by the digital signals to thereby decode the data, and rotating an image represented by the decoded data, and an apparatus for the same. The method and apparatus are particularly suitable for, e.g., the display or printing of a still image in a car navigation system or an electronic file system.
2. Description of the Background Art
Today, digital processing is predominant with image processing apparatuses over analog processing. A digital image processing apparatus digitizes an image signal, writes the resulting digital image data (pixels) in a memory, and then executes various kinds of signal processing with the image data in order to implement, e.g., required display. A rotation display function is one of various signal processing functions available today and extensively used for a broad range of applications based on some different schemes, as follows.
A first image rotating scheme uses an extra memory for display independent of a memory for storing image data, as taught in, e.g., Japanese patent publication No. 3851/1996 and Japanese patent laid-open publication Nos. 298032/1995, 254890/1992, 2600301/1990, and 173177/1988. When image data are written to the extra memory, the writing direction is varied in accordance with desired rotation.
A second image rotating scheme uses an SRAM (Static Random Access Memory) or similar high speed memory for the above extra memory independent of the image data memory, as disclosed in, e.g., Japanese patent laid-open publication Nos. 325753/1995, 180984/1991, 63695/1991, 94388/1989, 2440951/1987, and 240382/1986. For the rotation of an image, image data written to the high speed memory are read out in a particular direction.
A third image rotating scheme is such that image data rearranged to represent a rotated image are written to a memory beforehand and then displayed in a particular condition based on, e.g., whether or not the image should be rotated. This kind of scheme is proposed in Japanese patent laid-open publication No. 191690/1982 by way of example.
When a color image should be displayed after rotation, the above first to third image rotating schemes each writes input RGB (Red, Green and Blue) raw data in the addresses of a memory which will coincide with positions rotated in a designated direction, or reads data out of a memory, performs, calculation with the data and surrounding image data, and writes the resulting new image data matching with rotation in the memory. An image processing apparatus using any one of such conventional schemes assumes the rotation of RGB or three primary color data. However, the problem is that when luminance data and chrominance data are written to a memory point sequentially, as distinguished from line-sequentially, rotation processing is apt to prevent the data from being correctly displayed and practically fail, as will be described specifically later.
A fourth image rotating scheme which is a solution to the above problem is under study and rotates an image by using data other than the RGB data, as disclosed in Japanese patent laid-open patent publication No. 276422/1993. Briefly, the fourth scheme executes calculation with data input to and stored in an image processing apparatus and displays the result of calculation. A specific application of the fourth scheme is an image processing apparatus of the type writing the result of calculation in the same memory or another memory in, e.g., a faithful filter arrangement and then causing it to be displayed.
There is an increasing demand for an image processing apparatus allowing new functions to be added thereto without an increase in cost. To meet this demand, extended studies and researches are under way for, e.g., maintaining the minimum necessary memory capacity of an image processing apparatus while preserving the conventional basic construction and performance.
The state-of-the-art color image rotation schemes each rotates RGB raw data to positions coinciding with a rotated image and then write the rotated data in a memory, or reads stored data, performs. calculations with the data and surrounding image data (dots), and writes the resulting new image data matching with rotation in a memory, as stated previously. This, however, brings about a problem that when a DRAM (Dynamic RAM) is used as a temporary memory for temporarily storing the image data for the rotation of a color image, it increases the number of structural elements and therefore the cost. Likewise, an image processing apparatus based on the second image rotating scheme uses an expensive SRAM and is therefore expensive itself. The fourth image rotating scheme cannot complete image rotation in a time because it needs calculation. Consequently, an image forming apparatus with any one of the above conventional schemes cannot meet the demand stated earlier.
The signal subjected to Y/C separation may be subjected to 4:2:2 subsampling in order to meet the previously stated demand, as also proposed in the past. It has been reported that the 4:2:2 subsampling system does not deteriorate the quality of an image to be displayed because chrominance data are smaller in the amount of information to be transferred to a person than luminance data. By effectively using such a characteristic of chrominance data, it is possible to implement 4:2:2 subsampling with a memory capacity which is only two-thirds of the memory capacity necessary for, e.g., the RGB system or a 4:4:4 sampling system. In addition, an encoder for use in the image processing apparatus is simplified in circuit arrangement because it inverts and encodes every other chrominance data in response to a switching signal input thereto. The application of 4:2:2 subsampling system to an image processing apparatus is increasing because of the above advances.
However, assume that luminance data and chrominance data produced by the 4:2:2 subsampling system are stored in an image memory and simply rotated. Then, when chrominance data sequence is fed point-sequentially, a certain line has only chrominance data R-Y (C
r
) while the next line has only chrominance data B-Y (C
b
). If the data in such a relation are fed to an encoder having been used, a rotated image cannot be correctly displayed, as well known in the art. Thus, it is difficult to implement image rotation with a simple and efficient image processing apparatus.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide an image processing apparatus capable of rotating a color image correctly and rapidly with a simple circuit arrangement.
An image processing apparatus of the present invention is of the type including a Y (luminance)/C (color) separating section for separating an input color image signal into a luminance signal and a color signal, a digital converting section for sampling the luminance signal and color signal input from the Y/C separating section to thereby convert them to corresponding pixel-by-pixel digital data, a decoding section for time-division sampling the digital data input from the digital converting section and respectively representative of the luminance signal and color signal to thereby decode the digital data, a memory for storing the digital data decoded and output from the decoding section, and a memory control section for controlling writing and reading of the digital data out of the memory. A data dividing section divides the digital data into a plurality of blocks of digital data and causes the memory control section to write each of the blocks of digital data in one of a plurality of block areas defined in the memory area of the memory. A first parallel shift control section controls, block by block, first parallel shift for shifting the blocks of digital data to positions coinciding with the angle
Luu Matthew
Sajous Wesner
Sughrue & Mion, PLLC
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