Programmable buffer circuit

Details Programmable buffer circuit Programmable buffer circuit

1999-12-23

2002-02-19

Tokar, Michael (Department: 2819)

C326S030000, C326S087000

Reexamination Certificate

active

06347850

ABSTRACT:

BACKGROUND
This invention relates to programming data buffer output characteristics.
A data buffer is a digital electronic circuit for holding a binary value (e.g. 0 or 1), and communicating it to other circuits to which it is connected. The binary value is represented by a voltage level. It is common to connect a data buffer to a data bus which connects the output of the buffer to a receiving circuit.
It is common for multiple output buffers to be connected to a single data bus. To prevent such buffers from interfering with each other, it is common to construct all data buffers used with a given bus according to a bus protocol. A bus protocol specifies the signaling sense (whether 0 equals LOW and 1 equals HIGH or vice versa), the impedance of the buffer when it is not driving (whether it is high impedance or terminating impedance), the impedance of the buffer when it is driving, and the signal voltage swing. The signal voltage swing is the distance (in volts) between the HIGH voltage level and the LOW voltage level.
In a series-terminated bus protocol, the buffer is set to a high impedance when it is not driving. When the buffer is driving, the HIGH and LOW values are the respective rail voltages (e.g., Vcc and ground), and the impedance is set to be a specified output impedance.
In a typical parallel-terminated bus protocol, one output state (either HIGH or LOW) is equal to one of the rail voltages, while the other state is defined as being a certain distance (in volts, or “swing”), away from that voltage. A parallel-terminated protocol in which Vcc specifies one of the output states is called “Vcc referenced” while a parallel-terminated protocol in which ground specifies one of the output states is called “ground referenced” or “Vss referenced.” The output impedances of the HIGH and LOW states are not necessarily the same. When the parallel buffer is not driving, its output voltage and output impedance are the same as when it is driving at the rail voltage used to define one of the output states.
SUMMARY
In general, in one aspect, a method for establishing buffer impedance values includes establishing a first buffer impedance value by electronically adjusting a first impedance between a first voltage source and a first reference point until the potential at the first reference point has a predetermined relationship to a reference voltage and establishing a second buffer impedance value by adjusting the impedance between the second reference point and a second voltage source, until the potential at the second reference point has a predetermined relationship with the reference voltage.
In general, in another aspect, an electronic circuit includes a first impedance programmable device connected between a first voltage source and a first reference point and a second impedance programmable device connected between a second voltage source and a second reference point. A control logic in the circuit establishes a first buffer impedance value by adjusting the impedance of the first impedance programmable device until the potential at the first reference point has a predetermined relationship with a reference voltage and establishes a second buffer impedance value by adjusting the impedance of the second impedance programmable device until the potential at the second reference point has a predetermined relationship with the reference voltage.
Embodiments of the invention may have one or more of the following advantages. One buffer may be used for multiple bus protocols without significant additional overhead circuitry. Within the allowed buffer strength range, the buffer characteristics can be set by a single resistor and reference voltage source. Buffer characteristics can be programmed at any time. Buffer characteristics can be programmed in real time.
Other advantages and features will become apparent from the following description and from the claims.


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