Metal working – Method of mechanical manufacture – Electrical device making
Reexamination Certificate
1999-07-30
2002-06-25
Arbes, Carl J. (Department: 3729)
Metal working
Method of mechanical manufacture
Electrical device making
C029S832000, C029S846000
Reexamination Certificate
active
06408508
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to the field of printed circuit boards and more specifically to a printed circuit board having flexible trace surfaces that allow the traces attached thereto to move in a direction of thermal expansion of components soldered to the traces.
BACKGROUND OF THE INVENTION
Surface mount technology in general and ball grid array technology in particular are becoming increasing popular choices for integrated circuit packaging. Both the size and pin count of surface mount components continue to increase. This trend aggravates the problem of solder joint failure due to coefficient of thermal expansion mismatch between the printed circuit board and components mounted thereon. This problem is particularly acute for ball grid array components. Therefore, although the invention is applicable to any component packaging technology, it will be discussed using a ball grid array component as an example.
A bottom view of a ball grid array (BGA) component
10
is illustrated in FIG.
1
. The underside of the BGA component
10
contains a plurality of solder bumps
12
. Each solder bump
12
is electrically connected to an internal lead (not shown) which itself is connected to an integrated circuit formed on a silicon wafer (also not shown) inside the BGA component.
FIG. 2
illustrates the connection of a BGA component
10
to a printed circuit board
20
. Each solder bump
12
is soldered to a corresponding trace pad
28
on the printed circuit board
20
. As can be seen with reference to
FIG. 5
, the trace pad is an enlarged portion of the trace
27
. Referring back to
FIG. 2
, the trace pads
28
are in positions corresponding to the positions of the solder bumps
12
on the BGA component
10
. The other portions of the traces
27
are narrower to allow space for traces
27
between the trace pads
28
. The solder bumps
12
may be attached to the corresponding trace pads
28
by well known methods such as reflow soldering or laser soldering.
When power is applied to an integrated circuit, some of that power is converted to heat by the movement of electrons through the integrated circuit. When integrated circuits are heated, they expand. The amount of expansion relative to the heat of a material is expressed as a quantity known as the coefficient of thermal expansion. The higher the coefficient of thermal expansion, the more a material expands when it is heated.
Referring back to
FIG. 1
, the physical center of the BGA component
10
is indicated by the point labeled NP. The BGA component
10
is perfectly symmetrical, therefore the physical center NP of the BGA is also the thermal neutral point NP. The neutral point NP is the point on the BGA component
10
from which all thermal expansion occurs in a radial direction. Thermal expansion directions are indicated by the vectors “E” extending radially outward from the neutral point NP.
The amount of thermal expansion for each of the solder bumps
12
on the BGA component
10
is dependent upon the distance from the neutral point NP to the solder bump
12
. This distance is known as the distance to neutral point, or DNP. As the DNP increases, the amount of movement of a solder bump
12
from the neutral point NP also increases. One reason that components are designed with square packages is to minimize the DNP for all connections.
Referring back to
FIG. 2
, the vectors “E” indicate the direction of thermal expansion of the BGA component
10
from the neutral point NP. It should be appreciated that as heat is transferred from the BGA component
10
to the printed circuit board
20
, the printed circuit board
20
also expands. However, because the printed circuit board
20
and the BGA component
10
are usually made of different materials, the corresponding coefficients of thermal expansion (CTE) may also be different, or mismatched. The result is a net force (which may be positive or negative, depending upon the respective CTEs of the BGA component and the printed circuit board and the amount of heat transferred to the printed circuit board by the BGA component) in the direction of the vector E on the solder bumps
12
and trace pads
28
.
When leaded components (e.g. components with ‘J’ leads or gull wing leads) are used, the leads act as compliant members, allowing for forces on solder joints caused by coefficient of thermal expansion mismatch. However, when leadless components such as BGAs are used, the solder bump
12
is the only available compliant member.
When component sizes and corresponding DNPs are small, the forces on the solder bumps
12
are also small and do not cause a problem. However, when component sizes and corresponding DNPs are large, the forces on the solder bumps
12
are also large and can lead to failure of the solder joint.
FIG. 3
is an enlarged view of a single solder bump
12
that has failed. The force on the solder bump
12
in the direction of the vector “E” caused by the CTE mismatch between the BGA component
10
and the printed circuit board
20
has caused cracks
14
,
16
in the solder bump
12
. A crack
14
has completely broken the connection between the solder bump
12
and the BGA component
10
, resulting in an open circuit. A second crack
16
near the bottom of the solder bump
12
has also begun.
FIG. 4
illustrates one attempted solution to this problem. The spaces underneath the BGA component
10
between the solder bumps
12
and printed circuit board
20
are filled with an underfill material
18
. The underfill
18
acts as an adhesive between the BGA component
10
and the printed circuit board
20
such that movement between them is prevented.
There are two main disadvantages to this solution. First, the adhesive eventually fails, leading to solder joint failure after repeated thermal cycling. Second, the underfill must be “wicked” under the BGA component
10
between the solder bumps
12
, which is a time-consuming, and therefore expensive, procedure.
A second solution to the problem is to minimize the CTE mismatch between the BGA component
10
and the printed circuit board
12
. The disadvantage to this solution is that the materials needed to achieve a good CTE match result in increased production costs.
What is needed is an inexpensive and reliable apparatus and method for attaching components and printed circuit boards with mismatched coefficients of thermal expansion.
SUMMARY OF THE INVENTION
The present invention solves the problem identified above by providing a circuit board with traces attached to a flexible trace surface such that the traces can be displaced in a direction of thermal expansion of a component attached to the traces without causing the failure of the solder joint between the component and the trace. In one embodiment, the printed circuit board substrate is etched away in areas not covered by the traces such that flexible protuberances are formed from the substrate underneath the traces. Methods for forming such a printed circuit board are also disclosed. In one method, a conductive layer is deposited on the printed circuit board substrate. The conductive layer is then etched to form conductive traces. The printed circuit board substrate is then selectively etched using the traces as a mask to form mesas which support the conductive traces.
In a second printed circuit board embodiment, a flexible layer of a silicone based material is deposited onto the printed circuit board substrate. As used herein, silicone based material means a material comprising at least approximately 50% silicone. The traces are then formed on top of the flexible silicone layer. The flexible silicone layer allows the traces to move in the direction of thermal expansion of an attached component without causing failure of the solder joint between the trace and the component.
It is known in the art to manufacture printed circuit boards with elastomeric layers between the traces and the underlying substrate. For example, Exacta Circuits Ltd. produces a product known as “Chipstrate” that has such an elastomeric layer. Known elastomeric layer
Duesman Kevin G.
Farnworth Warren M.
Arbes Carl J.
Dickstein , Shapiro, Morin & Oshinsky, LLP
Micro)n Technology, Inc.
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