Integrated microprocessor unit generating separate memory and in

Details Integrated microprocessor unit generating separate memory and in Integrated microprocessor unit generating separate memory and in

1992-03-23

1995-06-27

Lee, Thomas C.

Boots, shoes, and leggings

395800, 3649256, 36492692, 36492693, G06F 1300, G06Z 1340, G06Z 1338

Patent

active

054287464

ABSTRACT:
A microprocessor formed on a single integrated circuit chip has separate sets of terminals providing read and write control timing signals to external memory and input-output devices. The memory control timing signals are generated at a rate as high as the memory devices will allow. The input-output device timing signals are provided at a rate as high as the input-output devices will allow, usually significantly lower rate than that of the memory devices. This then allows the memory transactions to occur at a rate that does not need to be reduced because of slower input-output devices in the same system. The need for external logic is significantly reduced by providing the memory timing signals in a form that is actually input to the memory devices, and by including a capability of providing timing signals to a number of different types of input-output devices having different control signal timing protocol requirements. A computer system using such a microprocessor unit is also described.

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