Method of forming a transistor in a semiconductor device

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S153000, C438S217000, C438S429000

Reexamination Certificate

active

06492246

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates generally to a method of manufacturing a transistor in a semiconductor device. More particularly, the present invention relates to a method of manufacturing a transistor in a semiconductor device by which a semiconductor substrate is isolated by an oxide layer with only a source, a drain and a channel region necessary for driving a transistor being left, thus obviating the current components due to parasitic factors to improve the punch-through characteristic.
2. Description of the Prior Art
A method of manufacturing a conventional MOS transistor will be explained by reference to
FIG. 1. A
device isolation film (not shown) for isolating a cell region and a field region is formed on a semiconductor substrate
11
. After a well
12
is formed on the semiconductor substrate
11
, an ion implant process for adjusting the threshold voltage is performed. Then, a gate oxide film
13
is formed on the semiconductor substrate
11
. Thereafter, a polysilicon layer, a polysilicon layer/a metal silicide layer or a metal layer, etc. is deposited on the gate oxide film
13
and is then patterned to form a gate electrode
14
. Next, after a spacer insulating film
15
is formed on the sidewall of the gate electrode
14
, a source/drain junction
16
is formed on the semiconductor substrate
11
by source/drain ion implant process.
In the transistor manufactured by the above method, if the voltage is applied to the drain and the gate is turned on, current will flows from the drain to the source. On the other hand, if the gate is turned off, the current from the drain to the source will be blocked. However, if the voltage applied to the drain is too great, unwanted current will flow into the well. This current is called a punch-through current. The punch-through current is generated when carriers are applied to a depletion layer and are then attracted by a bias of the depletion layer. This phenomenon becomes still severe as the length of the gate becomes narrower and will limit to manufacturing higher devices.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a method of manufacturing a transistor in a semiconductor device capable of improving reliability of the device, by removing a well being the cause of generation of the punch-through so that the punch-through current does not generate.
In order to accomplish the above object, a method of manufacturing a transistor in a semiconductor device according to the present invention is characterized in that it comprises the steps of providing a semiconductor substrate and etching one part of the semiconductor substrate to form a first trench at a position where a transistor will be formed; etching the other part of the semiconductor substrate to form two trenches at a position where a source junction and a drain junction will be formed; implanting oxygen ions into the entire portions of the semiconductor substrate including the first and second trenches and then performing a thermal process to form a buried oxide layer within the semiconductor substrate; isolating, by the buried oxide layer, the semiconductor substrate of the portion where a source/drain junction will be formed, and of the portion where a channel region will be formed, by polishing process; and performing ion implant process for controlling the threshold voltage to form a channel region and then forming a gate oxide film, a gate electrode and a source/drain junction.


REFERENCES:
patent: 5763310 (1998-06-01), Gardner
patent: 6103574 (2000-08-01), Iwasaki
patent: 6110799 (2000-08-01), Huang
patent: 6156618 (2000-12-01), Lee
patent: 6165854 (2000-12-01), Wu
patent: 6184107 (2001-02-01), Divakaruni et al.
patent: 6238960 (2001-05-01), Maszara et al.
patent: 6251734 (2001-06-01), Grivna et al.
patent: 6255193 (2001-07-01), Sperlich et al.
patent: 6274913 (2001-08-01), Brigham et al.
patent: 6277707 (2001-08-01), Lee et al.
patent: 6281082 (2001-08-01), Chen et al.
patent: 6316331 (2001-11-01), Tseng
patent: 6323105 (2001-11-01), Chen et al.
patent: 003732611 (1989-04-01), None
patent: 0135307 (1985-03-01), None
patent: 0112657 (1984-07-01), None
patent: 406338516 (1994-12-01), None

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method of forming a transistor in a semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method of forming a transistor in a semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method of forming a transistor in a semiconductor device will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2940997

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.